Philips Semiconductors Product specification
74LV377
Octal D-type flip-flop with data enable;
positive edge-trigger
2
1998 Jun 10 853–1935 19545
FEATURES
• Optimized for Low Voltage applications: 1.0 to 3.6V
• Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
• Typical V
OLP
(output ground bounce) 0.8V @ V
CC
= 3.3V,
T
amb
= 25°C
• Typical V
OHV
(output V
OH
undershoot) 2V @ V
CC
= 3.3V,
T
amb
= 25°C
• Ideal for addressable register applications
• Data enable for address and data synchronization applications
• Eight positive-edge triggered D-type flip-flops
• Output capability: standard
• I
CC
category: MSI
DESCRIPTION
The 74LV377 is a low–voltage CMOS device and is pin and function
compatible with 74HC/HCT377.
The 74LV377 has eight edge-triggered, D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable (E
) is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Q
n
) of
the flip-flop. The E
input must be stable only one set-up time prior to
the LOW-to-HIGH transition for predictable operation.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25°C; t
r
= t
f
2.5 ns
SYMBOL
PARAMETER CONDITIONS TYPICAL UNIT
t
PHL
/t
PLH
Propagation delay
CP to Q
n
C
L
= 15pF
13 ns
f
max
Maximum clock frequency
V
CC
= 3.3V
77 MHz
C
I
Input capacitance 3.5 pF
C
PD
Power dissipation capacitance per flip-flop Notes 1 and 2 20 pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in µW)
P
D
= C
PD
V
CC
2
f
i
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
20-Pin Plastic DIL –40°C to +125°C 74LV377 N 74LV377 N SOT146-1
20-Pin Plastic SO –40°C to +125°C 74LV377 D 74LV377 D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +125°C 74LV377 DB 74LV377 DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +125°C 74LV377 PW 74LV377PW DH SOT360-1
PIN DESCRIPTION
PIN
NUMBER
SYMBOL FUNCTION
1 E Data enable input (active-LOW)
2, 5, 6, 9, 12,
15, 16, 19
Q
0
to Q
7
flip-flop outputs
3, 4, 7, 8, 13,
14, 17, 18
D
0
to D
7
Data inputs
10 GND Ground (0V)
11 CP
Clock input
(LOW-to-HIGH, edge-triggered)
20 V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUTS
CP E D
n
Q
n
Load ‘‘1’’ ↑ l h H
Load ‘‘0’’ ↑ l l L
Hold (do nothing)
↑
X
h
H
X
X
No change
No change
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
↑ = LOW–to–HIGH CP transition
X = Don’t care
