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NB7L216MNG

P1-P3P4-P6P7-P9P10-P11
NB7L216
www.onsemi.com
4
Table 4. DC CHARACTERISTICS, CLOCK INPUTS, RSECL OUTPUTS (V
CC
= 2.375 V to 3.465 V, V
EE
= 0 V)
Symbol
Characteristic
−40 5C 25 5C 85 5C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current
(VTD/VTD
open)
27 35 27 35 27 35 mA
V
OH
Output HIGH Voltage
(Note 1 and 2)
V
CC
−1040
V
CC
−980
V
CC
−940
V
CC
−1000
V
CC
−950
V
CC
−900
V
CC
–950
V
CC
−900
V
CC
−850
mV
V
OL
Output LOW Voltage
(Note 1 and 2)
V
CC
−1520
V
CC
−1430
V
CC
−1320
V
CC
−1470
V
CC
−1370
V
CC
−1270
V
CC
–1440
V
CC
−1340
V
CC
−1240
mV
DIFFERENTIAL INPUT DRIVEN SINGLE-ENDED (see Figures 14 and 16)
V
TH
Input Threshold Reference Voltage
Range (Notes 3 and 5)
800 V
CC
−10
800 V
CC
−10
800 V
CC
−10
mV
V
IH
Single−ended Input HIGH Voltage 1105 V
CC
1105 V
CC
1105 V
CC
mV
V
IL
Single−ended Input LOW Voltage V
EE
V
th
−10
V
EE
V
th
−10
V
EE
V
th
−10
mV
V
ISE
Single-Ended Input Voltage
(V
IH
–V
IL
)
20 V
CC
20 V
CC
20 V
CC
mV
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (see Figures 15 and 17)
V
IHD
Differential Input HIGH Voltage
(Note 5)
1105 V
CC
1105 V
CC
1105 V
CC
mV
V
ILD
Differential Input LOW Voltage
(Note 5)
V
EE
V
CC
−10
V
EE
V
CC
−10
V
EE
V
CC
−10
mV
V
CMR
Input Common Mode Range
(Differential Configuration,
Notes 5 and 6)
800 V
CC
−5
800 V
CC
–5
800 V
CC
–5
mV
V
ID
Differential Input Voltage
(V
IHD
−V
ILD
)
10 2500 10 2500 10 2500 mV
V
IO
Input Offset Voltage (Note 4) −5 0 +5 −5 0 +5 −5 0 +5 mV
V
BB
Internally Generated Reference
Voltage Supply
(Only 3 V – 3.6 V Supply Load with
−100 mA)
V
CC
−1425
V
CC
−1345
V
CC
−1265
V
CC
−1425
V
CC
−1345
V
CC
−1265
V
CC
−1425
V
CC
−1345
V
CC
−1265
mV
I
IH
Input HIGH Current
D/Db (VTD/VTD
Open)
0 20 100 0 20 100 0 20 100
mA
I
IL
Input LOW Current
D/Db (VTD/VTD
Open)
−25 10 75 −25 10 75 −25 10 75
mA
R
TIN
Internal Input Termination Resistor 45 50 55 45 50 55 45 50 55
W
R
T_Coef
Internal Input Termination Resistor
Temperature Coefficient
6.38 6.38 6.38
mW/°C
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values
are applied individually under normal operating conditions and not valid simultaneously.
1. Outputs evaluated with 50 W resistors to V
TT
= V
CC
− 2.0 V for proper operation.
2. Input and output parameters vary 1:1 with V
CC
.
3. V
TH
is applied to the complementary input when operating in single−ended mode. V
th
= (V
IH
− V
IL
) / 2.
4. Typical standard deviation of input offset voltage is 1.76 mV.
5. V
th
, V
IH
, V
IL,,
and V
ISE
parameters must be complied with simultaneously.
6. V
IHD
, V
ILD,
V
ID
and V
CMR
parameters must be complied with simultaneously.
7. V
CMR
min varies 1:1 with V
EE
, V
CMR
max varies 1:1 with V
CC
. The V
CMR
range is referenced to the most positive side of the differential input
signal.
NB7L216
www.onsemi.com
5
Table 5. AC CHARACTERISTICS (V
CC
= 2.375 V to 3.465 V, V
EE
= 0 V; (Note 1))
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
V
OUTPP
Output Voltage Amplitude (@ V
INPPmin
)
f
in
≤ 7.0 GHz
f
in
≤ 8.5 Ghz (See Figure 4)
275
100
380
250
275
100
380
250
275
100
380
250
mV
f
DATA
Maximum Operating Data Rate 10 12 10 12 10 12 Gb/s
|S21| Power Gain DC to 7 GHz 35 35 35 dB
|S11| Input Return Loss @ 7 GHz −10 −10 −10 dB
|S22| Output Return Loss @ 7 GHz −5 −5 −5 dB
|S12| Reverse Isolation (Differential Configuration) −25 −25 −25 dB
IIP3 Input Third Order Intercept 0 0 0 dBm
t
PLH
,
t
PHL
Propagation Delay to Output Differential @ 1 GHz 60 120 180 60 120 180 60 120 180 ps
t
SKEW
Duty Cycle Skew (Note 1)
Device to Device Skew (Note 6)
2
5
10
20
2
5
10
20
2
5
10
20
ps
t
JITTER
RMS Random Clock Jitter
f
in
v 8.5 Ghz (Note 4)
Peak-to-Peak Data Dependent Jitter (Note 5)
f
DATA
= 3.5 Gb/s
f
DATA
= 5.0 Gb/s
f
DATA
= 10 Gb/s
f
DATA
= 12 Gb/s
0.1
1
3
4
4
0.5
7
9
9
9
0.1
1
3
4
4
0.5
7
9
9
9
0.1
1
3
4
4
0.5
7
9
9
9
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 3 and Figure 12)
20 2500 20 2500 20 2500 mV
t
r
t
f
Output Rise/Fall Times @ 0.5 Ghz (20% − 80%)
Q, Q
30 45 30 45 30 45
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values
are applied individually under normal operating conditions and not valid simultaneously.
1. Measured by forcing V
INPPmin
from a 50% duty cycle clock source. All loading with an external R
L
= 50 W to V
TT
=V
CC
− 2.0 V. Input edge
rates 40 ps (20%− 80%).
2. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw− and Tpw+ @ 1 GHz.
3. V
INPP
(MAX) cannot exceed V
CC
− V
EE
. Input voltage swing is a single-ended measurement operating in differential mode.
4. Additive RMS jitter with 50% duty cycle clock signal.
5. Additive peak-to-peak data dependent jitter with input NRZ data at PRBS 2
23
−1.
6. Device to device skew is measured between outputs under identical transition @ 1 GHz.
0
50
100
150
200
250
300
350
400
450
500
2467891011120
Figure 4. Output Voltage Amplitude (V
OUTPP
) versus
Input Clock Frequency (f
IN
) and Temperature
(V
INPP
= 400 mV, V
CC
= 3.3 V and V
EE
= 0 V)
25°C
−40°C
85°C
INPUT CLOCK FREQUENCY (GHz)
OUTPUT VOLTAGE AMPLITUDE (mV)
0
50
100
150
200
250
300
350
400
450
500
2467891011120
−40°C
25°C
85°C
INPUT CLOCK FREQUENCY (GHz)
OUTPUT VOLTAGE AMPLITUDE (mV)
Figure 5. Output Voltage Amplitude (V
OUTPP
) versus
Input Clock Frequency (f
IN
) and Temperature
(V
INPP
= 20 mV, V
CC
= 3.3 V and V
EE
= 0 V)
NB7L216
www.onsemi.com
6
TIME (66 ps/div)
Figure 6. Typical Output Waveform at 2.488 Gb/s with
PRBS 2
23
−1 (V
INPP
= 400 mV, Input Signal DDJ = 12 ps)
VOLTAGE (60 mV/div)
TIME (54 ps/div)
Figure 7. Typical Output Waveform at 3.5 Gb/s with
PRBS 2
23
−1 (V
INPP
= 400 mV, Input Signal DDJ = 12 ps)
VOLTAGE (60 mV/div)
VOLTAGE (60 mV/div)
TIME (37 ps/div)
Figure 8. Typical Output Waveform at 5 Gb/s with PRBS
2
23
−1 (V
INPP
= 400 mV, Input Signal DDJ = 12 ps)
TIME (21 ps/div)
Figure 9. Typical Output Waveform at 10 Gb/s with
PRBS 2
23
−1 (V
INPP
= 400 mV, Input Signal DDJ = 12 ps)
VOLTAGE (60 mV/div)
Device DDJ = 1 ps Device DDJ =1 ps
Device DDJ =2 ps
Device DDJ = 3 ps
FREQUENCY (GHz)
GAIN (dB)
0
5
10
15
20
25
30
35
40
Figure 10. Small Signal Gain – S21 Magnitude*
−50
−40
−30
−20
−10
0
GAIN (dB)
FREQUENCY (GHz)
Figure 11. Input and Output Reflection – S11
and S22 Magnitude*
0
S11
S22
2 4 6 8 10 12 14 16
02 46 810121416
*T
A
= +25°C, V
CC
= 3.3 V, V
EE
=0 V, P
IN
= −44 dBm,Z
S
= Z
L
= 50 W, input and output matching network is not included.
P1-P3P4-P6P7-P9P10-P11

NB7L216MNG

Mfr. #:
Buy NB7L216MNG
Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels 2.5V/3.3V Diff RCVR w/High Gain
Lifecycle:
New from this manufacturer.
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