6.42
IDT709389L
High-Speed 64K x 18 Synchronous Pipelined Dual-Port Static RAM Industrial and Commercial Temperature Ranges
2
INDEX
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
FT/PIPE
R
OE
R
R/W
R
CNTRST
R
CE
1R
CE
0R
GND
A
12R
A
13R
A
11R
A
10R
A
9R
A
14R
I
/
O
1
0
R
I/O
11R
I/O
12R
I/O
13R
I/O
14R
I/O
15R
GND
UB
R
LB
R
4844 drw 02
I/O
15L
FT/PIPE
L
OE
L
R/W
L
CNTRST
L
CE
1L
CE
0L
Vcc
A
14L
A
13L
A
12L
A
11L
A
10L
A
9L
I/O
10L
I/O
11L
I/O
12L
I/O
13L
I/O
14L
UB
L
LB
L
GND
I
/
O
5
R
I
/
O
4
R
I
/
O
3
R
I
/
O
2
R
I
/
O
0
R
I
/
O
0
L
G
N
D
I
/
O
2
L
I
/
O
4
L
I
/
O
5
L
I
/
O
6
L
I
/
O
7
L
I
/
O
3
L
I
/
O
1
R
I
/
O
7
R
I
/
O
8
R
I
/
O
9
R
I
/
O
8
L
I
/
O
9
L
I
/
O
6
R
A
7
R
A
8
L
A
7
L
A
6
R
A
5
R
A
4
R
A
3
R
A
2
R
A
1
R
A
0
R
C
L
K
R
C
N
T
E
N
R
C
L
K
L
C
N
T
E
N
L
A
0
L
A
2
L
A
3
L
A
5
L
A
6
L
A
1
L
A
4
L
A
8R
G
N
D
V
c
c
I
/
O
1
L
V
c
c
G
N
D
709389PF
PN100-1
(4)
100-Pin TQFP
Top View
(5)
A
15R
A
15L
I/O
16R
I/O
17R
I/O
17L
I/O
16L
A
D
S
L
A
D
S
R
G
N
D
11/07/01
Pin Configurations
(1,2,3)
NOTES:
1. All V
CC pins must be connected to power supply.
2. All GND pins must be connected to ground.
3. Package body is approximately 14mm x 14mm x 1.4mm
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Description
The IDT709389 is a high-speed 64K x 18 bit synchronous Dual-
Port RAM. The memory array utilizes Dual-Port memory cells to allow
simultaneous access of any address from both ports. Registers on
control, data, and address inputs provide minimal setup and hold
times. The timing latitude provided by this approach allows systems
to be designed with very short cycle times.
With an input data register, the IDT709389 has been optimized for
applications having unidirectional or bidirectional data flow in bursts.
An automatic power down feature, controlled by CE
0 and CE1, permits
the on-chip circuitry of each port to enter a very low standby power
mode. Fabricated using IDT’s CMOS high-performance technology,
these devices typically operate on only 1.2W of power.
