Enpirion
®
Power Evaluation Board User Guide
EP53x2Q PowerSoC
Figure 3. Placement of external divider resistors
Dynamically Adjustable Output
The EP53x2QI is designed to allow for dynamic switching between the
predefined voltage levels, or between the predefined output levels and an
external divider. The inter-voltage slew rate is optimized to prevent excess
undershoot or overshoot as the output voltage levels transition. The slew rate is
3mV/uS.
This feature can be tested by connecting the VSx jumper center pins to logic
driver to toggle between the various V
OUT
states.
Input and Output Capacitors
The input capacitance requirement is 2.2 uF for the EP5352QI and the
EP5362QI, and 4.7uF for the EP5382QI. Altera recommends that a low ESR
MLCC capacitor be used. The EP53x2QI Evaluation Board is populated with a
2.2uF 0805 capacitor. There are pre-tinned pads that allows for additional 0805
capacitors to experiment with input filter performance.
The output capacitance requirement is a minimum of 10uF. The control loop is
designed to be stable with up to 60uF of total output capacitance. The evaluation
board comes populated with a single 10uF 0805 capacitor.
The board has pre-tinned pads for up to 2 additional output capacitors with either
0805 or 1206 footprint.
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