Data Sheet AD811
Rev. G | Page 15 of 20
AN 80 MHZ VOLTAGE-CONTROLLED AMPLIFIER
CIRCUIT
The voltage-controlled amplifier (VCA) circuit of Figure 46 shows
the AD811 being used with the AD834, a 500 MHz, 4-quadrant
multiplier. The AD834 multiplies the signal input by the dc control
voltage, V
G
. The AD834 outputs are in the form of differential
currents from a pair of open collectors, ensuring that the full
bandwidth of the multiplier (which exceeds 500 MHz) is
available for certain applications. Here, the AD811 op amp
provides a buffered, single-ended, ground-referenced output.
Using feedback resistors R8 and R9 of 511 Ω, the overall gain
ranges from −70 dB for V
G
= 0 V to +12 V (a numerical gain of
+4) when V
G
= 1 V. The overall transfer function of the VCA is
V
OUT
= 4 (X1 − X2)(Y1 − Y2), which reduces to V
OUT
= 4 V
G
V
IN
using the labeling conventions shown in Figure 46. The circuits
−3 dB bandwidth of 80 MHz is maintained essentially constant—
that is, independent of gain. The response can be maintained
flat to within ±0.1 dB from dc to 40 MHz at full gain with the
addition of an optional capacitor of about 0.3 pF across the
feedback resistor R8. The circuit produces a full-scale output of
±4 V for a ±1 V input and can drive a reverse-terminated load
of 50 Ω or 75 Ω to ±2 V.
The gain can be increased to 20 dB (×10) by raising R8 and R9
to 1.27 kΩ, with a corresponding decrease in −3 dB bandwidth
to approximately 25 MHz. The maximum output voltage under
these conditions is increased to ±9 V using ±12 V supplies.
The gain-control input voltage, V
G
, may be a positive or negative
ground-referenced voltage, or fully differential, depending on
the choice of connections at Pin 7 and Pin 8. A positive value of
V
G
results in an overall noninverting response. Reversing the sign
of V
G
simply causes the sign of the overall response to invert. In
fact, although this circuit has been classified as a voltage-controlled
amplifier, it is also quite useful as a general-purpose, four-quadrant
multiplier, with good load driving capabilities and fully
symmetrical responses from the X and Y inputs.
The AD811 and AD834 can both be operated from power supply
voltages of ±5 V. While it is not necessary to power them from
the same supplies, the common-mode voltage at W1 and W2
must be biased within the common-mode range of the input
stage of the AD811. To achieve the lowest differential gain and
phase errors, it is recommended that the AD811 be operated
from power supply voltages of ±10 V or greater. This VCA
circuit operates from a ±12 V dual power supply.
Figure 46. An 80 MHz Voltage-Controlled Amplifier
X2
X1 +V
S
W1
Y1 Y2 W2
–V
S
U1
AD834
U3
AD811
R4
182
R5
182
R1 100
R2 100
R3
249
R6
294
R7
294
R9*
R8*
R
L
FB
C2
0.1F
C1
0.1F
–12V
V
OUT
FB
+12V
V
G
V
IN
*R8 = R9 = 511 FOR 4 GAIN
R8 = R9 = 1.27k FOR 10 GAIN
+
1234
8765
7
6
4
3
2
+
00866-E-047
AD811 Data Sheet
A VIDEO KEYER CIRCUIT
By using two AD834 multipliers, an AD811, and a 1 V dc source,
a special form of a two-input VCA circuit called a video keyer
can be assembled. Keying is the term used in reference to blending
two or more video sources under the control of a third signal or
signals to create such special effects as dissolves and overlays.
The circuit shown in Figure 47 is a two-input keyer, with video
inputs V
A
and V
B
, and a control input V
G
. The transfer function
(with V
OUT
at the load) is given by
V
OUT
= GV
A
+ (1G)V
B
where G is a dimensionless variable (actually, just the gain of the
A signal path) that ranges from 0 when V
G
= 0 to 1 when V
G
=
1 V. Thus, V
OUT
varies continuously between V
A
and V
B
as G
varies from 0 to 1.
Circuit operation is straightforward. Consider first the signal path
through U1, which handles video input V
A
. Its gain is clearly 0
when V
G
= 0, and the scaling chosen ensures that it has a unity
value when V
G
= 1 V; this takes care of the first term of the transfer
function. On the other hand, the V
G
input to U2 is taken to the
inverting input X2 while X1 is biased at an accurate 1 V. Thus,
when V
G
= 0, the response to video input V
B
is already at its
full-scale value of unity, whereas when V
G
= 1 V, the differential
input X1X2 is 0. This generates the second term.
The bias currents required at the output of the multipliers are
provided by R8 and R9. A dc level-shifting network comprising
R10/R12 and R11/R13 ensures that the input nodes of the
AD811 are positioned at a voltage within its common-mode
range. At high frequencies, C1 and C2 bypass R10 and R11,
respectively. R14 is included to lower the HF loop gain and is
needed because the voltage-to-current conversion in the
AD834s, via the Y2 inputs, results in an effective value of the
feedback resistance of 250 Ω; this is only about half the value
required for optimum flatness in the AD811s response. (Note
that this resistance is unaffected by G: when G = +1, all the
feedback is via U1, while when G = 0 it is all via U2). R14
reduces the fractional amount of output current from the
multipliers into the current-summing inverting input of the
AD811 by sharing it with R8. This resistor can be used to adjust
the bandwidth and damping factor to best suit the application.
Figure 47. A Practical Video Keyer Circuit
U3
AD811
7
6
4
3
2
+
X2
X1 +V
S
W1
Y1 Y2 W2
–V
S
U1
AD834
1 2 3 4
8 7 6 5
X2
X1 +V
S
W1
Y1 Y2 W2
–V
S
U1
AD834
1 2 3 4
8 7 6 5
R8
29.4
29.4
R9
R12
6.98k
6.98k
R13
R10
2.49k
C3
FB
V
OUT
FB
V
G
R6
226
R7
45.3
+5V
–5V
+5V
U4
AD589
R5
113
(0 TO +1V dc)
V
A
(±1V FS)
–5V
R4
1.02k
R3
100
R2
174
R1
1.87k
V
B
(±1V FS)
+5V
–5V
C1
0.1µF
0.1µF
0.1µF
0.1µF
R14
SEE TEXT
+5V
–5V
C4
C2
R11
2.49k
LOAD
GND
LOAD
GND
200
TO Y2
TO PIN 6
AD811
SETUP FOR DRIVING
REVERSE-TERMINATED LOAD
Z
O
Z
O
200
V
OUT
INSET
00866-E-048
Rev. G | Page 16 of 20
Data Sheet AD811
To generate the 1 V dc needed for the 1G term, an AD589
reference supplies 1.225 V ± 25 mV to a voltage divider consisting
of resistors R2 through R4. Potentiometer R3 should be adjusted
to provide exactly 1 V at the X1 input.
In this case, an arrangement is shown using dual supplies of ±5 V
for both the AD834 and the AD811. Also, the overall gain is
arranged to be unity at the load when it is driven from a reverse-
terminated 75 Ω line. This means that the dual VCA has to operate
at a maximum gain of +2, rather than +4 as in the VCA circuit
of Figure 46. However, this cannot be achieved by lowering the
feedback resistor because below a critical value (not much less
than 500 Ω) the peaking of the AD811 may be unacceptable.
This is because the dominant pole in the open-loop ac response
of a current feedback amplifier is controlled by this feedback
resistor. It would be possible to operate at a gain of ×4 and then
attenuate the signal at the output. Instead, the signals have been
attenuated by 6 dB at the input to the AD811; this is the
function of R8 through R11.
Figure 48 is a plot of the ac response of the feedback keyer when
driving a reverse-terminated 50 Ω cable. Output noise and
adjacent channel feedthrough, with either channel fully off and
the other fully on, is about −50 dB to 10 MHz. The feedthrough
at 100 MHz is limited primarily by board layout. For V
G
= 1 V,
the −3 dB bandwidth is 15 MHz when using a 137 Ω resistor for
R14 and 70 MHz with R14 = 49.9 Ω. For more information on
the design and operation of the VCA and video keyer circuits,
refer to the AN-216 Application Note, Video VCAs and Keyers:
Using the AD834 and AD811 by Brunner, Clarke, and Gilbert,
available on the Analog Devices, Inc. website at www.analog.com.
Figure 48. A Plot of the AC Response of the Video Keyer
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10
CLOSED-LOOP GAIN (dB)
FREQUENCY (Hz)
100k10k 1M 10M 100M
00866-E-049
R14 = 49.9
R14 = 137
GAIN
ADJACENT CHANNEL
FEEDTHROUGH
Rev. G | Page 17 of 20

AD811ARZ-16-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Video Amplifiers HI-Spd VIDEO IC
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