1/13June 2004
STP9NK50Z - STP9NK50ZFP
STB9NK50Z - STB9NK50Z-1
N-CHANNEL 500V - 0.72 - 7.2A TO-220/FP/D
2
PAK/I
2
PAK
Zener-Protected SuperMESH™ MOSFET
TYPICAL R
DS
(on) = 0.72
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
GATE CHARGE MINIMIZED
VERY LOW INTRINSIC CAPACITANCES
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
LIGHTING
ORDERING INFORMATION
TYPE V
DSS
R
DS(on)
I
D
Pw
STP9NK50Z
STP9NK50ZFP
STB9NK50Z
STB9NK50Z-1
500 V
500 V
500 V
500 V
<0.85
<0.85
<0.85
<0.85
7.2 A
7.2 A
7.2 A
7.2 A
110 W
30 W
110 W
110 W
SALES TYPE MARKING PACKAGE PACKAGING
STP9NK50Z P9NK50Z TO-220 TUBE
STP9NK50ZFP P9NK50ZFP TO-220FP TUBE
STB9NK50ZT4 B9NK50Z
D
2
PAK
TAPE & REEL
STB9NK50Z-1 B9NK50Z
I
2
PAK
TUBE
TO-220
TO-220FP
1
2
3
1
3
D
2
PAK
1
2
3
I
2
PAK
INTERNAL SCHEMATIC DIAGRAM
STP9NK50Z - STP9NK50ZFP - STB9NK50Z - STB9NK50Z-1
2/13
ABSOLUTE MAXIMUM RATINGS
( ) Pulse width limited by safe operating area
(1) I
SD
7.2A, di/dt 200A/µs, V
DD
V
(BR)DSS
,T
j
T
JMAX.
(*) Limited only by maximum temperature allowed
THERMAL DATA
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost-
effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the usage
of external components.
Symbol Parameter Value Unit
STP9NK50Z
STB9NK50Z
STB9NK50Z-1
STP9NK50ZFP
V
DS
Drain-source Voltage (V
GS
=0)
500 V
V
DGR
Drain-gate Voltage (R
GS
=20k)
500 V
V
GS
Gate- source Voltage ± 30 V
I
D
Drain Current (continuous) at T
C
=25°C
7.2 7.2 (*) A
I
D
Drain Current (continuous) at T
C
= 100°C
4.5 4.5 (*) A
I
DM
( )
Drain Current (pulsed) 28.8 28.8 (*) A
P
TOT
Total Dissipation at T
C
=25°C
110 30 W
Derating Factor 0.88 0.24 W/°C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3500 V
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
V
ISO
Insulation Withstand Voltage (DC) - 2500 V
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55to150
-55to150
°C
°C
TO-220 / D
2
PAK /
I
2
PAK
TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1.14 4.2 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300 °C
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
7.2 A
E
AS
Single Pulse Avalanche Energy
(starting T
j
=25°C, I
D
=I
AR
,V
DD
=50V)
190 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs=± 1mA (Open Drain) 30 V
3/13
STP9NK50Z - STP9NK50ZFP - STB9NK50Z - STB9NK50Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
=1mA,V
GS
= 0 500 V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
=0)
V
DS
=MaxRating
V
DS
=MaxRating,T
C
= 125 °C
1
50
µA
µA
I
GSS
Gate-body Leakage
Current (V
DS
=0)
V
GS
= ± 20V ±10 µA
V
GS(th)
Gate Threshold Voltage
V
DS
=V
GS
,I
D
= 100µA
3 3.75 4.5 V
R
DS(on)
Static Drain-source On
Resistance
V
GS
=10V,I
D
= 3.6 A 0.72 0.85
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
(1) Forward Transconductance V
DS
=15V
,
I
D
= 3.6 A 5.3 S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
=25V,f=1MHz,V
GS
= 0 910
125
30
pF
pF
pF
C
oss eq.
(3) Equivalent Output
Capacitance
V
GS
=0V,V
DS
= 0V to 400V 75 pF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
=250V,I
D
=3.6A
R
G
=4.7 V
GS
=10V
(Resistive Load see, Figure 3)
17
20
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
=400V,I
D
=7.2A,
V
GS
=10V
32
6
18
nC
nC
nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
V
DD
=250V,I
D
=3.6A
R
G
=4.7 V
GS
=10V
(Resistive Load see, Figure 3)
45
22
ns
ns
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
=400V,I
D
=7.2A,
R
G
=4.7Ω, V
GS
= 10V
(Inductive Load see, Figure 5)
15
13
30
ns
ns
ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
7.2
28.8
A
A
V
SD
(1)
ForwardOnVoltage
I
SD
=7.2A,V
GS
=0
1.6 V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 7.2 A, di/dt = 100A/µs
V
DD
=40V,T
j
= 150°C
(see test circuit, Figure 5)
238
1.5
12.6
ns
µC
A

STB9NK50ZT4

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
MOSFET N-Ch 500 Volt 7.2 A Zener SuperMESH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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