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73S8024RN-IL/F

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27
73S8024RN Data Sheet DS_8024RN_020
4 Rev. 2
Figures
Figure 1: 73S8024RN Block Diagram ...................................................................................................... 2
Figure 2: Activation Sequence – RSTIN Low When CMDVCC Goes Low .............................................. 10
Figure 3: Activation Sequence – RSTIN High When CMDVCCB Goes Low ........................................... 11
Figure 4: Deactivation Sequence ........................................................................................................... 12
Figure 5: Timing Diagram – Management of the Interrupt Line OFF ....................................................... 13
Figure 6: I/O and I/OUC State Diagram ................................................................................................. 14
Figure 7: I/O – I/OUC Delays Timing Diagram ....................................................................................... 14
Figure 8: 73S8024RN – Typical Application Schematic.......................................................................... 15
Figure 9: 20QFN Mechanical Drawing ................................................................................................... 21
Figure 10: 20QFN Pin Out ..................................................................................................................... 22
Figure 11: 32QFN Mechanical Drawing ................................................................................................. 23
Figure 12: 32QFN Pin Out ..................................................................................................................... 24
Tables
Table 1: Choice of V
CC
Pin Capacitor ....................................................................................................... 9
Table 2: Card Clock Frequency ............................................................................................................... 9
DS_8024RN_020 73S8024RN Data Sheet
Rev. 2 5
1 Pin Description
CARD INTERFACE
Name
Pin
28SO
Pin
20QFN
Pin
32QFN
Description
I/O
11
5
8
Card I/O: Data signal to/from card. Includes a pull-up
resistor to V
CC.
AUX1
13
–
11
AUX1: Auxiliary data signal to/from card. Includes a
pull-up resistor to V
CC.
AUX2
12
–
10
AUX2: Auxiliary data signal to/from card. Includes a
pull-up resistor to V
CC.
RST
16
8
14
Card reset: provides reset (RST) signal to card.
CLK
15
7
13
Card clock: provides clock signal (CLK) to card. The rate
of this clock is determined by the external crystal
frequency or frequency of the external clock signal applied
on XTALIN and CLKDIV selections.
PRES
10
4
7
Card Presence switch: active high indicates card is
present. Should be tied to GND when not used, but it
Includes a high-impedance pull-down current source.
PRES
9
3
6
Card Presence switch: active low indicates card is
present. Should be tied to V
DD
when not used, but it
Includes a high-impedance pull-up current source.
VCC
17
9
15
Card power supply – logically controlled by sequencer,
output of LDO regulator. Requires an external filter
capacitor to the card GND.
GND
14
6
12
Card ground.
MISCELLANEOUS INPUTS AND OUTPUTS
Pin
28SO
Pin
20QFN
Pin
32QFN
Description
24
15
23
Crystal oscillator input: can either be connected to crystal
or driven as a source for the card clock.
25
16
24
Crystal oscillator output: connected to crystal. Left open
if XTALIN is being used as external clock input.
18
–
17
V
DD
fault threshold adjustment input: this pin can be used
to adjust the V
DDF
values (that controls deactivation of the
card). Must be left open if unused.
5
–
2, 9,
16, 25,
32
Non-connected pin.
POWER SUPPLY AND GROUND
Pin
28SO
Pin
20QFN
Pin
32QFN
Description
21
12
20
System interface supply voltage and supply voltage for
internal circuitry.
6
2
3
LDO regulator power supply source.
4
1
1
LDO Regulator ground.
22
13
21
Digital ground.
73S8024RN Data Sheet DS_8024RN_020
6 Rev. 2
MICROCONTROLLER INTERFACE
Name
Pin
28SO
Pin
20QFN
Pin
32QFN
Description
CMDVCC
19
10
18
Command VCC (negative assertion): Logic low on this pin
causes the LDO regulator to ramp the V
CC
supply to the
card and initiates a card activation sequence, if a card is
present.
5V/#V
3
20
31
5 volt / 3 volt card selection: Logic one selects 5 volts for
V
CC
and card interface, logic low selects 3 volt operation.
When the part is to be used with a single card voltage,
this pin should be tied to either GND or V
DD
. However, it
includes a high impedance pull-up resistor to default this
pin high (selection of 5V card) when not connected.
CLKSTOP
7
–
4
Stops the card clock signal during a card session when
set high (card clock STOP mode). Internal pull-down
resistor allows this pin to be left as an open circuit if the
clock STOP mode is not used.
CLKLVL
8
–
5
Sets the logic level of the card clock STOP mode when
the clock is de-activated by setting pin 7 high. Logic low
selects card STOP low. Logic high selects card STOP
high. Internal pull-down resistor allows this pin to be left
as an open circuit if the clock STOP mode is not used.
CLKDIV1
CLKDIV2
1
2
18
19
29
30
Sets the divide ratio from the XTAL oscillator (or external
clock input) to the card clock. These pins include
pull-down resistors.
CLKDIV1 CLKDIV2 CLOCK RATE
0 0 XTALIN/8
0 1 XTALIN/4
1 1 XTALIN/2
1 0 XTALIN
OFF
23
14
22
Interrupt signal to the processor. Active Low - Multi-
function indicating fault conditions and card presence.
Open drain output configuration. It includes an internal
21kΩ pull-up to V
DD.
RSTIN
20
11
19
Reset Input: This signal is the reset command to the card.
I/OUC
26
17
26
System controller data I/O to/from the card. Includes a
pull-up resistor to V
DD.
AUX1UC
27
–
27
System controller auxiliary data I/O to/from the card.
Includes a pull-up resistor to V
DD.
AUX2UC
28
–
28
System controller auxiliary data I/O to/from the card.
Includes a pull-up resistor to V
DD.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27

73S8024RN-IL/F

Mfr. #:
Buy 73S8024RN-IL/F
Manufacturer:
Maxim Integrated
Description:
I/O Controller Interface IC Smart Card Interface ISO7816-3 & EVM4.0
Lifecycle:
New from this manufacturer.
Delivery:
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