IRU1261
4
Rev. 2.0
09/19/02
www.irf.com
APPLICATION INFORMATION
Introduction
The IRU1261 is a dual fixed output Low Dropout (LDO)
regulator available in a TO-263 package. This voltage
regulator is designed specifically for Pentium II proces-
sor applications requiring 2.5V and 1.5V supplies, elimi-
nating the need for a second regulator resulting in lower
overall system cost. The IRU1261 is designed to take
advantage of 5V supply to provide the drive for the pass
transistor, allowing 2.5V supply to be generated from
3.3V input. This feature improves the power dissipation
of the 2.5V regulator substantially allowing a smaller
heat sink to be used for the application. Compared to
the IRU1260 dual adjustable regulator, the IRU1261 in-
cludes the resistor dividers that are otherwise needed
with the IRU1260, eliminating four external components
and their tolerances, resulting in a more accurate initial
accuracy for each output voltage. Other features of the
device include: fast response to sudden load current
changes, such as GTL+ termination application and ther-
mal shutdown protection to protect the device if an over-
load condition occurs.
Stability
The IRU1261 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for the microprocessor
applications use standard electrolytic capacitors with
typical ESR in the range of 50 to 100mV and the output
capacitance of 500 to 1000mF. Fortunately as the ca-
pacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1261 takes advantage
of this phenomena in making the overall regulator loop
stable. For most applications a minimum of 100mF alu-
minum electrolytic capacitor with the maximum ESR of
0.3V such as Sanyo, MVGX series, Panasonic FA se-
ries as well as the Nichicon PL series insures both sta-
bility and good transient response. The IRU1261 also
requires a 1mF ceramic capacitor connected from VIN to
VCTRL and a 10V, 0.1W resistor in series with VCTRL pin
in order to further insure stability.
Thermal Design
The IRU1261 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction tempera-
tures in the range of 1508C, it is recommended that the
selected heat sink be chosen such that during maxi-
mum continuous load operation the junction tempera-
ture is kept below this number. The example given shows
the steps in selecting the proper regulator heat sink for
driving the Pentium II processor GTL+ termination re-
sistors and the Clock IC using IRU1261 in TO-263 pack-
age.
Example:
Assuming the following specifications:
The steps for selecting a proper heat sink to keep the
junction temperature below 1358C is given as:
1) Calculate the maximum power dissipation using:
2) Assuming a TO-263 surface mount package, the junc-
tion to ambient thermal resistance of the package is:
3) The maximum junction temperature of the device is
calculated using the equation below:
Since this is lower than our selected 1358C maxi-
mum junction temperature (1508C is the thermal shut-
down of the device), TO-263 package is a suitable
package for our application.
Layout Consideration
The IRU1261 like all other high speed linear regulators
need to be properly laid out to insure stable operation.
The most important component is the output capacitor,
which needs to be placed close to the output pin and
connected to this pin using a plane connection with a
low inductance path.
VIN = 3.3V
VOUT1 = 2.5V
VOUT2 = 1.5V
IOUT1(MAX) = 0.2A
IOUT2(MAX) = 1.5A
TA = 358C
PD = IOUT13(VIN - VOUT1) + IOUT23(VIN - VOUT2)
PD = 0.23(3.3 - 2.5) + 1.53(3.3 - 1.5) = 2.86W
uJA = 308C/W for 1" square pad area
TJ = TA + PD3uJA
TJ = 35 + 2.86330 = 1218C
