LOC211P

I
NTEGRATED
C
IRCUITS
D
IVISION
www.ixysic.com
4
R07
LOC211P
Manufacturing Information
Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to
the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper
operation of our devices when handled according to the limitations and information in that standard as well as to any
limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according
to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device Moisture Sensitivity Level (MSL) Rating
LOC211P MSL 1
ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
Soldering Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD-020
must be observed.
Device Maximum Temperature x Time
LOC211P 260ºC for 30 seconds
Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to
remove flux residue is acceptable. Since IXYS Integrated Circuits Division employs the use of silicone coating as
an optical waveguide in many of its optically isolated products, the use of a short drying bake could be necessary
if a wash is used after solder reflow processes. Chlorine- or Fluorine-based solvents or fluxes should not be used.
Cleaning methods that employ ultrasonic energy should not be used.
I
NTEGRATED
C
IRCUITS
D
IVISION
Specification: DS-LOC211P-R07
©Copyright 2015, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
6/5/2015
For additional information please visit our website at: www.ixysic.com
5
LOC211P
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to
its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
NOTES:
1. Coplanarity = 0.1016 (0.004) max.
2. Leadframe thickness does not include solder plating
(1000 microinch maximum).
(inches)
mm
DIMENSIONS
8.890 TYP
(0.350 TYP)
0.406 TYP
(0.016 TYP)
10.160±0.381
(0.400±0.015)
7.493±0.127
(0.295±0.005)
10.363±0.127
(0.408±0.005)
1.270 TYP
(0.050 TYP)
0.635 X 45°
(0.025 X 45°)
0.254 ±0.0127
(0.010±0.0005)
1.016 TYP
(0.040 TYP)
0.508±0.1016
(0.020±0.004)
PIN 1
PIN 16
2.057±0.051
(0.081±0.002)
MIN: 0.0254 (0.001)
MAX: 0.102 (0.004)
Lead to Package Standoff:
1.90
(0.075)
1.27
(0.050)
9.30
(0.366)
0.60
(0.024)
PCB Land Pattern
Dimensions
mm
(inches)
Embossment
Embossed Carrier
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
330.2 DIA.
(13.00 DIA.)
K
0
=3.20
(0.126)
K
1
=2.70
(0.106)
A
0
=10.90
(0.429)
W=16
(0.630)
B
0
=10.70
(0.421)
P=12.00
(0.472)
NOTES:
1. All dimensions carry tolerances of EIA Standard 481-2
2. The tape complies with all “Notes” for constant dimensions
listed on page 5 of EIA-481-2
LOC211P
LOC211PTR Tape & Reel
Mechanical Dimensions

LOC211P

Mfr. #:
Manufacturer:
IXYS Integrated Circuits
Description:
High Linearity Optocouplers Dual Linear Optocoupler
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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