©2002 Fairchild Semiconductor Corporation Rev. B1, November 2002
TIS73/TIS74
TO-92
Absolute Maximum Ratings *
T
A
=25°C unless otherwise noted
* These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1. These ratings are based on a maximum junction temperature of 150 degrees C.
2. These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Electrical Characteristics
T
A
=25°C unless otherwise noted
* Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 3.0%
Symbol Parameter Value Units
V
DG
Drain-Gate Voltage 30 V
V
GS
Gate-Source Voltage -30 V
I
GF
Forward Gate Current 10 mA
T
J
, T
STG
Operating and Storage Junction Temperature Range -55 ~ +150 °C
Symbol Parameter Test Condition Min. Typ. Max. Units
Off Characteristics
V
(BR)GSS
Gate-Source Breakdown Voltage I
G
= 1.0µA, V
DS
= 0 -30 V
I
GSS
Gate Reverse Current V
GS
= 15V, V
DS
= 0
V
GS
= 15V, V
DS
= 0, T
a
= 100°C
-2.0
-5.0
nA
µA
I
D
(off) Drain Cutoff Leakage Current V
DS
= 15V, V
GS
= -10V
V
DS
= 15V, V
GS
= -10V,
T
a
= 100°C
-2.0
-5.0
nA
µA
V
GS
(off) Gate-Source Cutoff Voltage V
DS
= 15V, I
D
= 4.0nA TIS73
TIS74
-4.0
-2.0
-10
-6.0
V
V
On Characteristics *
I
DSS
Zero-Gate Voltage Drain Current * V
DS
= 15V, V
GS
= 0 TIS73
TIS74
50
20 100
mA
mA
r
DS
(on) Drain-Source On Resistance V
DS
≤ 0.1V, V
GS
= 0 TIS73
f = 1.0KHz TIS74
25
40
Ω
Ω
Small Signal Characteristics
C
iss
Input Capacitance V
DS
= 0, V
GS
= -10V, f = 1.0MHz 18 pF
C
rss
Reverse Transfer Capacitance V
DS
= 0, V
GS
= -10V, f = 1.0MHz 8.0 pF
Switching Characteristics
t
r
Rise Time V
GS
(off) = -10V, V
GS
(on) = 0,
I
D
= 20mA, V
DS
= 10V TIS73
TIS74
3.0
4.0
ns
ns
t
on
Turn-On Time V
GS(off)
= -10V, V
GS
(on) = 0,
I
D
= 20mA, V
DS
= 10V 6.0 ns
t
off
Turn-Off Time V
GS
(off) = -10V, V
GS
(on) = 0,
I
D
= 20mA, V
DS
= 10V TIS73
TIS74
25
50
ns
ns
TIS73/TIS74
N-Channel General Purpose Amplifier
• This device is designed for low level analog switching, sample and
hold circuits and chopper stabilized amplifiers.
• Sourced from process 54.
1. Gate 2. Source 3. Drain
1
