74AHC_AHCT1G32_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 11 July 2012 6 of 13
NXP Semiconductors 74AHC1G32-Q100; 74AHCT1G32-Q100
2-input OR gate
[1] t
pd
is the same as t
PLH
and t
PHL
.
[2] Typical values are measured at V
CC
= 3.3 V.
[3] Typical values are measured at V
CC
= 5.0 V.
[4] C
PD
is used to determine the dynamic power dissipation P
D
(W).
P
D
=C
PD
V
CC
2
f
i
+ (C
L
V
CC
2
f
o
)where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
12. Waveforms
For type 74AHCT1G32-Q100
t
pd
propagation
delay
A and B to Y;
see Figure 5;
V
CC
= 4.5 V to 5.5 V
[1]
[3]
C
L
= 15 pF - 3.3 6.9 1.0 8.0 1.0 9.0 ns
C
L
= 50 pF - 4.8 7.9 1.0 9.0 1.0 10 ns
C
PD
power
dissipation
capacitance
per buffer;
C
L
=50pF;f=1 MHz;
V
I
=GNDtoV
CC
[4]
-17- - - - -pF
Table 8. Dynamic characteristics
…continued
GND = 0 V; t
r
= t
f
=
3.0 ns. For waveform see Figure 5. For test circuit see Figure 6.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
Measurement points are given in Table 9.
Fig 5. The input (A and B) to output (Y) propagation delays
mna167
A, B input
Y output
t
PHL
t
PLH
V
M
V
M
Table 9. Measurement points
Type number Input Output
V
I
V
M
V
M
74AHC1G32-Q100 GND to V
CC
0.5 V
CC
0.5 V
CC
74AHCT1G32-Q100 GND to 3.0 V 1.5 V 0.5 V
CC
