NCP694
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS FOR FIX VERSION (V
in
= V
out(nom.)
+ 1.0 V, V
CE
= V
in
, C
in
= 4.7 mF, C
out
= 4.7 mF, T
A
=
25°C, unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
Output Voltage (T
A
= 25°C, I
out
= 100 mA, V
in
V
out
= 1 V)
0.8 V
1.0 V
1.2 V
2.5 V
3.3 V
V
out
0.770
0.970
1.170
2.450
3.234
0.8
1.0
1.2
2.5
3.3
0.830
1.030
1.030
2.550
3.366
V
Output Current (V
in
V
out
= 1 V) I
out
1 A
Input voltage V
in
1.4 6.0 V
Line Regulation (I
out
= 100 mA) Reg
line
0.05 0.2 %/V
Load Regulation (I
out
= 1 mA to 300 mA, V
in
= V
out
+ 2.0 V) Reg
load03
15 2 15 mV
Load Regulation (I
out
= 1 mA to 1 A, V
in
= V
out
+ 2.0 V) Reg
load1
3 mV
Supply Current (I
out
= 0 A, (V
in
V
out
) = 1 V, V
CE
= V
in
) I
ss
60 100
mA
Standby Current (V
CE
= 0V, V
in
= 6.0 V) I
stby
0.1 1.0
mA
Short Current Limit (V
out
= 0 V) I
sh
250 mA
Output Voltage Temperature Coefficient T
c
$100 ppm/°C
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
V
thCE
1.0
0
6
0.4
V
Enable Pulldown Current 100 220 nA
Drop Output Voltage (T
A
= 25°C, I
out
= 300 mA)
0.8 V Output voltage V
out
(V)
1.0 V
1.2 V
2.5 V
3.3 V
V
in
V
out
0.33
0.22
0.18
0.10
0.05
0.570
0.470
0.320
0.150
0.100
V
Drop Output Voltage (T
A
= 25°C, I
out
= 1A)
0.8 V Output voltage V
out
(V)
1.0 V
1.2 V
2.5 V
3.3 V
V
in
V
out
0.72
0.64
0.56
0.32
0.18
V
Ripple Rejection (Ripple 200 mV
pp
, I
out
=100 mA, f = 1 kHz) PSRR 70 dB
Output Noise (BW = 10 Hz to 100 kHz, I
out
= 1 mA)
V
noise
30
mV
rms
Thermal Shutdown Temperature/Hysteresis T
shd
/Hyst 150/30 °C
R
DS(on)
of additional output transistor (D version only) R
DS(on)
30
W
2. Maximum package power dissipation limits must be observed.
3. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
NCP694
http://onsemi.com
5
ELECTRICAL CHARACTERISTIC FOR ADJUSTABLE VERSION (V
in
= V
out
+ 1 V, V
CE
= V
in
, C
in
= C
out
= 4.7 mF, T
A
= 25°C, unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
Input Voltage V
in
1.4 6 V
Supply Current (V
out
= V
ADJ
, V
in
= 2 V, V
CE
= V
in
) I
SS
60 100 uA
Standby Current (V
in
= 6.0 V, V
CE
= 0 V) I
standby
0.1 1 uA
Reference Voltage For Adjustable Voltage Regulator (V
out
= V
ADJ
, V
in
= 2.0 V,
I
out
= 100 mA
V
ref
0.97 1 1.03 V
Output Voltage Range Vout
range
1 V
in
V
Output Current (V
out
= V
ADJ
, V
in
= 2.0 V) I
out
1 A
Load Regulation (V
in
= 1.4 V, 1 mA < I
out
< 300 mA, V
out
= V
ADJ
) V
out
/I
out
15 2 15 mV
Load Regulation (V
in
= 1.7 V, 1 mA < I
out
< 1 A, V
out
= V
ADJ
) V
out
/I
out
3 mV
Dropout Voltage (V
out
= V
ADJ
, I
out
= 300 mA) V
drop300
0.18 0.32 V
Dropout Voltage (V
out
= V
ADJ
, I
out
= 1 A) V
drop1
0.56 V
Line regulation (V
out
= V
ADJ
, I
out
= 100 mA, 1.5 V < V
in
< 6.0 V V
out
/V
in
0.05 0.2 %V
PSRR ( f = 1 kHz, V
out
= V
ADJ
, V
in
= 2.5 V, I
out
= 100 mA, Input Ripple 0.5 V
pp
) PSRR 70 dB
Output Voltage Temperature Coefficient (I
out
= 100 mA, 40°C < T
J
< 85°C) V
out
/T
J
$100 ppm/°C
Short Current Limit (V
out
= V
ADJ
= 0) I
lim
250 mA
Enable Pulldown Current I
CE
100 220 nA
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth
CE
1
0
6
0.4
V
Thermal Shutdown Temperature/Hysteresis T
shdn
/
Hyst
150/
30
°C
R
DS(on)
of additional output transistor (D version only) R
DS(on)
30
W
NCP694
http://onsemi.com
6
APPLICATIONS INFORMATION
A typical application circuit for the NCP694 series is
shown in Figure 5, Typical Application Schematic.
Input Decoupling (C1)
A 4.7 mF capacitor either ceramic or tantalum is
recommended and should be connected as close as possible
to the pins of NCP694 device. Higher values and lower ESR
will improve the overall line transient response.
Output Decoupling (C2)
The minimum decoupling value is 4.7 mF and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors as well as
tantalum devices. If a tantalum capacitor is used, and its ESR
is large, the loop oscillation may result. Because of this,
select C2 carefully considering its frequency characteristics.
Larger values improve noise rejection and load regulation
transient response.
Enable Operation
The enable pin CE will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
section of this data sheet. If the enable is not used then the
pin should be connected to V
in
. The D version devices
(NCP694DxxxxT1G) have additional circuitry in order to
reach the turnoff speed faster than normal type. When the
mode is into standby with CE signal, auto discharge
transistor turns on.
Hints
Please be sure the V
in
and GND lines are sufficiently wide.
If their impedance is high, noise pickup or unstable
operation may result.
Set external components, especially the output capacitor,
as close as possible to the circuit, and make leads as short as
possible.
Thermal
As power across the NCP694 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature effect the rate of temperature rise for the part.
This is stating that when the NCP694 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation applications.
Output Voltage Setting of Adjustable Version.
An external two resistors are required for setting desired
output voltage as shows Figure 3. Output Voltage Setting.
The equation for the output voltage is mentioned in equation
below.
V
out
+ V
ref
) R1 @ I1
(eq. 1)
+ V
ref
) R1 @
ǒ
I
adj
) I2
Ǔ
+ V
ref
) R1 @
ǒ
V
ref
ńR
adj
Ǔ
) R1 @
ǒ
V
ref
ńR2
Ǔ
+ V
ref
@
ǒ
1 )
ǒ
R1ńR
adj
Ǔ
)
ǒ
R1ńR2
Ǔ
Ǔ
+ 1.0 @
ǒ
1 )
ǒ
R1ńR
adj
Ǔ
)
ǒ
R1ńR2
Ǔ
Ǔ
For better accuracy, choosing R2 << R
adj
reduces the error
given by ADJ pin consumption. The typical resistance R
adj
is showed in Figure 4. ADJ Pin Resistance
Figure 3. Output Voltage Setting
GND
ADJ
R1
R2
I1
I2
Vout
Radj
Vref = 1 V
Iadj
1.8
1.6
1.4
1.2
1.0
0.8
50 25 0 25 50 75 100
Figure 4. ADJ Pin Resistance vs. Temperature
T
J
, TEMPERATURE (°C)
R
adj
, RESISTANCE (MW)

NCP694HSAN33T1G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 1A CMOS B/S LDO
Lifecycle:
New from this manufacturer.
Delivery:
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