13
LT1506
APPLICATIONS INFORMATION
WUU
U
and does not fall to less than 1/3 of nominal output voltage,
foldback will not take effect. With the overloaded condi-
tion, output current will increase to a typical value of 5.7A,
determined by peak switch current limit of 6A. With
V
IN
= 15V, V
OUT
= 4V (5V overloaded) and I
OUT
= 5.7A:
IA
D AVG
()
=
()
=
5 7 15 4
15
418
.
.
This is safe for short periods of time, but it would be
prudent to check with the diode manufacturer if continu-
ous operation under these conditions must be tolerated.
BOOST␣ PIN␣ CONSIDERATIONS
For most applications, the boost components are a 0.27µF
capacitor and a 1N914 or 1N4148 diode. The anode is
connected to the regulated output voltage and this gener-
ates a voltage across the boost capacitor nearly identical
to the regulated output. In certain applications, the anode
may instead be connected to the unregulated input volt-
age. This could be necessary if the regulated output
voltage is very low (< 3V) or if the input voltage is less than
5V. Efficiency is not affected by the capacitor value, but the
capacitor should have an ESR of less than 1 to ensure
that it can be recharged fully under the worst-case condi-
tion of minimum input voltage. Almost any type of film or
ceramic capacitor will work fine.
For nearly all applications, a 0.27µF boost capacitor works
just fine, but for the curious, more details are provided
here. The size of the boost capacitor is determined by
switch drive current requirements. During switch on time,
drain current on the capacitor is approximately I
OUT
/ 50. At
peak load current of 4.25A, this gives a total drain of 85mA.
Capacitor ripple voltage is equal to the product of on time
and drain current divided by capacitor value;
V = (t
ON
)(85mA/C). To keep capacitor ripple voltage to
less than 0.6V (a slightly arbitrary number) at the worst-
case condition of t
ON
= 1.8µs, the capacitor needs to be
0.27µF. Boost capacitor ripple voltage is not a critical
parameter, but if the minimum voltage across the capaci-
tor drops to less than 3V, the power switch may not
saturate fully and efficiency will drop. An
approximate
formula for absolute minimum capacitor value is:
C
IVV
fV V
MIN
OUT OUT IN
OUT
=
()( )
()
()
//
.
50
28
f = Switching frequency
V
OUT
= Regulated output voltage
V
IN
= Minimum input voltage
This formula can yield capacitor values substantially less
than 0.27µF, but it should be used with caution since it
does not take into account secondary factors such as
capacitor series resistance, capacitance shift with tem-
perature and output overload.
SHUTDOWN FUNCTION AND UNDERVOLTAGE
LOCKOUT
Figure 4 shows how to add undervoltage lockout (UVLO)
to the LT1506. Typically, ULVO is used in situations where
the input supply is
current limited
, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
load to the source and can cause the source to current limit
or latch low under low source voltage conditions. ULVO
prevents the regulator from operating at source voltages
where these problems might occur.
Threshold voltage for lockout is about 2.38V, slightly less
than the internal 2.42V reference voltage. A 3.5µA bias
current flows
out
of the pin at threshold. This internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making R
LO
10k or less. If shutdown
current is an issue, R
LO
can be raised to 100k, but the error
due to initial bias current and changes with temperature
should be considered.
Rk
R
RV V
VR A
LO
HI
LO IN
LO
=
()
=
()
()
10
238
238 35
to 100k 25k suggested
.
..µ
V
IN
= Minimum input voltage
14
LT1506
APPLICATIONS INFORMATION
WUU
U
2.38V
0.4V
GND
V
SW
LT1506
INPUT
R
FB
R
HI
1506 F04
OUTPUT
SHDN
LOCKOUT
IN
TOTAL
SHUTDOWN
3.5µA
R
LO
C1
+
Figure 4. Undervoltage Lockout
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capaci-
tance to the switching nodes are minimized. If high
resistor values are used, the shutdown pin should be
bypassed with a 1000pF capacitor to prevent coupling
problems from the switch node. If hysteresis is desired in
the undervoltage lockout point, a resistor R
FB
can be
added to the output node. Resistor values can be calcu-
lated from:
R
RV VV V
RA
RRV V
HI
LO IN OUT
FB HI OUT
=
−+
()
+
[]
()
=
()( )
238 1
238 235
./
..
/
∆∆
µ
25k suggested for R
LO
V
IN
= Input voltage at which switching stops as input
voltage descends to trip level
V = Hysteresis in input voltage level
Example: output voltage is 5V, switching is to stop if input
voltage drops below 6V and should not restart unless
input rises back to 7.5V. V is therefore 1.5V and V
IN
= 6V.
Let R
LO
= 25k.
R
k
kA
k
k
Rk k
HI
FB
=
−+
()
+
[]
()
=
()
=
=
()
=
25
6
23815 5 1 15
238 25 35
25 5 2
229
48
48 5 1 5 160
../ .
..
.
.
/.
µ
SWITCH NODE CONSIDERATIONS
For maximum efficiency, switch rise and fall times are
made as short as possible. To prevent radiation and high
frequency resonance problems, proper layout of the com-
ponents connected to the switch node is essential. B field
(magnetic) radiation is minimized by keeping catch diode,
switch pin, and input bypass capacitor leads as short as
possible. E field radiation is kept low by minimizing the
length and area of all traces connected to the switch pin
and BOOST pin. A ground plane should always be used
under the switcher circuitry to prevent interplane cou-
pling. A suggested layout for the critical components is
shown in Figure 5. Note that the feedback resistors and
compensation components are kept as far as possible
15
LT1506
APPLICATIONS INFORMATION
WUU
U
from the switch node. Also note that the high current
ground path of the catch diode and input capacitor are kept
very short and separate from the analog ground line.
The high speed switching current path is shown schemati-
cally in Figure 6. Minimum lead length in this path is
essential to ensure clean switching and low EMI. The path
including the switch, catch diode, and input capacitor is
the only one containing nanosecond rise and fall times. If
you follow this path on the PC layout, you will see that it is
irreducibly short. If you move the diode or input capacitor
away from the LT1506, get your resumé in order. The
other paths contain only some combination of DC and
500kHz triwave, so are much less critical.
Figure 5. Suggested Layout (Topside Only Shown)
Figure 6. High Speed Switching Path
1
U1
C1
CONNECT TO
GROUND PLANE
KEEP FB AND V
C
COMPONENTS
AWAY FROM HIGH FREQUENCY,
HIGH CURRENT COMPONENTS
PLACE FEEDTHROUGHS
AROUND GND PIN FOR GOOD
THERMAL CONDUCTIVITY
R3
D2
C4
R2
L1
1506 F05
C5 C6GND
V
OUT
D1C3V
IN
GND
CONNECT TO
GROUND PLANE
MINIMIZE LT1506 C3, D1 LOOP
KELVIN SENSE
V
OUT
TAKE OUTPUT
DIRECTLY FROM
END OF OUTPUT
CAPACITOR
1506 F06
5V
L1
V
IN
HIGH
FREQUENCY
CIRCULATING
PATH
LOAD
SWITCH NODE

LT1506CR-3.3#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 4.5A, 500kHz Buck Sw Reg
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union