LTC3440
13
3440fd
For more information www.linear.com/LTC3440
applications inForMation
Input Voltage > 4.5V
For applications with input voltages above 4.5V which could
exhibit an overload or short-circuit condition, a 2Ω/1nF
series snubber is required between the SW1 pin and GND.
A Schottky diode such as the Phillips PMEG2010EA or
equivalent from SW1 to V
IN
should also be added as close
to the pins as possible. For the higher input voltages V
IN
bypassing becomes more critical, therefore, a ceramic
bypass capacitor as close to the V
IN
and GND pins as
possible is also required.
Operating Frequency Selection
There are several considerations in selecting the operat
-
ing frequency of the converter. The first is, what are the
sensitive frequency bands that cannot tolerate any spec-
tral noise? For example, in products incorporating RF
communications, the
455kHz IF frequency is sensitive to
any noise, therefore switching above 600kHz is desired.
Some communications have sensitivity to 1.1MHz and in
that case a 2MHz converter frequency may be employed.
Other considerations are the physical size of the converter
and efficiency. As the operating frequency goes up, the
inductor and filter capacitors go down in value and size.
The trade off is in efficiency since the switching losses due
to gate charge are going up proportional with frequency.
Additional quiescent current due to the output switches
GATE charge is given by:
Buck: (0.5 V
IN
f) mA
Boost: [0.25 (V
IN
+ V
OUT
) f ] mA
Buck/Boost: f (0.75 V
IN
+ 0.25 V
OUT
) mA
where f = switching frequency in MHz
The other component of ripple is due to the ESR (equiva
-
lent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden ceramic
capacitors, AVX TPS series tantalum capacitors or Sanyo
POSCAP are recommended.
Input Capacitor Selection
Since the V
IN
pin is the supply voltage for the IC it is
recommended to place at least a 4.7µF, low ESR bypass
capacitor.
Table 2. Capacitor Vendor Information
SUPPLIER PHONE FAX WEB SITE
AVX (803) 448-9411 (803) 448-1943 www.avxcorp.com
Sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com
Taiyo Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com
Optional Schottky Diodes
To achieve a 1%-2% efficiency improvement above
50mW, Schottky diodes can be added across synchronous
switches B (SW1 to GND) and D (SW2 to V
OUT
). The
Schottky diodes will provide a lower voltage drop during
the break-before-make time (typically 15ns) of the NMOS to
PMOS transition. General purpose diodes such as a 1N914
are not recommended due to the slow recovery times and
will compromise efficiency. If desired a large Schottky
diode, such as an MBRM120T3, can be used from SW2 to
V
OUT
. A low capacitance Schottky diode is recommended
from GND to SW1 such as a Phillips PMEG2010EA or
equivalent.
Output Voltage > 4.3V
A Schottky diode from SW to V
OUT
is required for output
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage
on SW2 due to the parasitic lead and trace inductance.
LTC3440
14
3440fd
For more information www.linear.com/LTC3440
applications inForMation
Closing the Feedback Loop
The LTC3440 incorporates voltage mode PWM control. The
control to output gain varies with operation region (Buck,
Boost, Buck-Boost), but is usually no greater than 15. The
output filter exhibits a double pole response is given by:
f
FILTER _POLE
=
1
2 π L C
OUT
Hz(inBuck mode
)
f
FILTER_POLE
=
V
IN
2 V
OUT
π L C
OUT
Hz (inBoost mode)
where L is in Henries and C
OUT
is the output filter capaci-
tor in Farads.
The output filter zero is given by:
f
FILTER _ ZERO
=
1
2 π R
ESR
C
OUT
Hz
where R
ESR
is the capacitor equivalent series resistance.
A troublesome feature in Boost mode is the right-half
plane zero (RHP), and is given by:
f
RHPZ
=
V
IN
2
2 π I
OUT
L V
OUT
Hz
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorporated
to stabilize the loop but at a cost of reduced bandwidth
and slower transient response. To ensure proper phase
margin, the loop requires to be crossed over a decade
before the LC double pole.
The unity-gain frequency of the error amplifier with the
Type I compensation is given by:
f
UG
=
1
2 π R1 CP1
Hz
Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a higher
bandwidth, Type III compensation is required. Two zeros
are required to compensate for the double-pole response.
f
POLE1
1
2 π 32e
3
R1 C
P1
Hz
Which is extremely close to DC
f
ZERO1
=
1
2 π R
Z
C
P1
Hz
f
ZERO2
=
1
2 π R1 C
Z1
Hz
f
POLE2
=
1
2 π R
Z
C
P2
Hz
Figure 8. Error Amplifier with Type III Compensation
1.22V
R1
R2
3440 F08
FB
9
V
C
C
P1
C
Z1
R
Z
V
OUT
10
C
P2
+
ERROR
AMP
Figure 7. Error Amplifier with Type I Compensation
1.22V
R1
R2
3440 F07
FB
9
V
C
C
P1
V
OUT
10
+
ERROR
AMP
LTC3440
15
3440fd
For more information www.linear.com/LTC3440
Short-Circuit Improvements
The LTC3440 is current limited to 2.7A peak to protect
the IC from damage. At input voltages above 4.5V a cur
-
rent limit condition may produce undesirable voltages
to the IC due to the series inductance of the package, as
well as the traces and external components. Following
the recommendations for output voltage >4.3V and input
voltage >4.5V will improve this condition. Additional
short-circuit protection can be accomplished with some
external circuitry.
In an overload or short-circuit condition the LTC3440 volt
-
age loop opens and the error amp control voltage on the V
C
pin slams to the upper clamp level. This condition forces
boost mode operation in order to attempt to provide more
output voltage and the IC hits a peak switch current limit of
2.7A. When switch current limit is reached switches B and
D turn on for the remainder of the cycle to reverse the volts
seconds on the inductor. Although this prevents current
run away, this condition produces four switch operation
producing a current foldback characteristic and the aver
-
age input current drops. The IC is trimmed to guarantee
greater than 1A average input current to meet the maximum
load demand, but in a short-circuit or overload condition
the foldback characteristic will occur producing higher
peak switch currents. To minimize this affect during this
condition the following circuits can be utilized.
Restart Circuit
For a sustained short-circuit the circuit in Figure 9 will force
a soft-start condition. The only design constraint is that
R2/C2 time constant must be longer than the soft-start
components R1/C1 to ensure start-up.
Simple Average Input Current Control
A simple average current limit circuit is shown in
Figure 10. Once the input current of the IC is above ap-
proximately 1A,
Q1 will start sourcing current into the FB
pin and lower the output voltage to maintain the average
input current. Since the voltage loop is utilized to perform
average current limit, the voltage control loop is main
-
tained and the V
C
voltage does not slam. The averaging
function of current comes from the fact that voltage loop
compensation is also used with this circuit.
Figure 9. Soft-Start Reset Circuitry for a Sustained Short-Circuit
C2
10nF
C1
4.7nF
R2
1M
R1
1M
V
OUT
V
IN
SOFT-START
SO/SS
M2
NMOS
VN2222
M1
NMOS
VN2222
D1
1N4148
3440 F09
applications inForMation
Figure 10. Simple Input Current Control
Utilizing the Voltage Loop
INPUT_VOLTAGE
FB_PIN
VIN_PIN
Q1
2N3906
R1
0.5Ω
C1
10µF
V1

LTC3440EMS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 500mA Synch. Buck-Boost Converter
Lifecycle:
New from this manufacturer.
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