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CAT1232LPZ-GT3

P1-P3P4-P6P7-P9P10-P11
CAT1232LP, CAT1832
© 2015 SCILLC. All rights reserved. 1 Publication Order Number: CAT1232LP/D
January, 2015 – Rev. 7
Characteristics subject to change without notice
5 V and 3.3 V Supply Monitor, Watchdog Timer,
Manual Reset, with Active High & Low Resets
FEATURES
Selectable reset voltage tolerance
— CAT1232LP for 5 V supply
— CAT1832 for 3.3 V supply
Selectable watchdog period:
150 ms, 600 ms or 1.2 s
Two reset outputs
— Active high, push-pull reset output
— Active low, open-drain reset output
(CAT1232LP)
— Active low, push-pull reset output (CAT1832)
Debounced manual push-button reset
Compact SOIC and MSOP packages
For Ordering Information details, see page 11.
APPLICATIONS
Microprocessor Systems
Portable Equipment
Controllers
Single Board Computers
Instrumentations
Telecommunications
FUNCTIONAL DIAGRAM
DESCRIPTION
The CAT1232LP and CAT1832 microprocessor
supervisors can halt and restart a “hung-up” or
“stalled” microprocessor, restart a microprocessor
after a power failure, and debounce a manual/push-
button microprocessor reset switch. The devices are
drop in replacements for the Maxim/Dallas
Semiconductor DS1232LP and DS1832 supervisors
Precision reference and comparator circuits monitor
the 5 V or 3.3 V system power supply voltage, V
CC
.
During power-up or when the power supply falls
outside selectable tolerance limits, both the RESET
and RESET
¯¯¯¯¯¯
become active. After the power supply
voltage rises above the RESET threshold voltage, the
reset signals remain active for a minimum of 250ms,
allowing the power supply and system processor to
stabilize. The trip-point tolerance
input, TOL, selects
the trip level tolerance to be either 5% or 10% for the
CAT1232LP 5 V supply and 10% or 20% for the
CAT1832 3.3 V supply.
Each device has a push-pull, active HIGH reset
output. The CAT1232LP also has an open drain,
active LOW reset output while the CAT1832 also has
a push-pull, active LOW reset output.
A debounced manual reset input activates the reset
outputs and holds them active for a minimum period of
250 ms after being released.
Also included is a watchdog timer to reset a
microprocessor that has stopped due to a software or
hardware failure. Three watchdog time-out periods are
selectable: 150 ms, 600 ms and 1.2 s. If the ST
¯¯
input
is not strobed low before the watchdog time out period
expir
es, the reset signals become active for a
minimum of 250 ms.
ST
RESET
PBRST
40kΩ
TOL
V
CC
–
+
Reference
V
CC
RESET
TD
Push Button Debounce
Watchdog Timebase Selection
Reset &
Watchdog Timer
(CAT1232LP)
Watchdog Transition Detector
RESET
(CAT1832)
Tolerance Selection
CAT1232LP, CAT1832
Doc. No. MD-3018 Rev. F 2 © 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
PIN CONFIGURATION
SOIC 8 Lead
MSOP 8 Lead
PDIP 8 Lead
PBRST
¯¯¯¯¯¯
1 8
V
CC
TD
2 7
ST
¯¯
TOL
3 6
RESET
¯¯¯¯¯¯
GND
4 5
RESET
CAT
SOIC 16 Lead
NC
1 16
NC
PBRST
¯¯¯¯¯¯
2 15
V
CC
NC
3 14
NC
TD
4 13
ST
¯¯
NC
5 12
NC
TOL
6 11
RESET
¯¯¯¯¯¯
NC
7 10
NC
GND
8 9
RESET
CAT
PIN DESCRIPTION
Pin Number
8-Lead
Package
Pin Number
16-Lead
Package Name Function
1 2
PBRST
¯¯¯¯¯¯
Debounced manual pushbutton reset input
2 4 TD
Watchdog typical time delay selection:
a) t
TD
= 150 ms for TD = GND
b) t
TD
= 600 ms for TD = Open
c) t
TD
= 1200 ms for TD = V
CC
3 6 TOL
CAT1232LP TOL selects 5% (TOL = GND) or 10% (TOL = V
CC
) trip
point tolerance. CAT1832 TOL selects 10% (TOL = GND) or 20%
TOL = V
CC
) trip point tolerance.
4 8 GND Ground
5 9 RESET
Active HIGH reset output. RESET is active
1. If V
CC
falls below the reset voltage trip point
2. If PBRST
¯¯¯¯¯¯
is low
3. If ST
¯¯
is not strobed low before the timeout period set by TD expires.
4. During power-up.
6 11 RESET Active LOW reset output. (See RESET)
7 13
ST
¯¯
Strobe Input
8 15 V
CC
Power Supply
1, 3. 5, 7, 10,
12, 14, 16
NC No internal connection
ABSOLUTE MAXIMUM RATINGS
(*)
Parameters Ratings Units
Voltage on V
CC
-0.5 to 7.0 V
Voltage on ST
¯¯
and TD
-0.5 to V
CC
+ 0.5 V
Voltage on PBRST
¯¯¯¯¯¯
,
RESET
¯¯¯¯¯¯
and RESET
-0.5 to V
CC
+ 0.5 V
Parameters Ratings Units
Maximum Junction Temperature 125 ºC
Storage Temperature Range -65 to +150 ºC
Lead Soldering Temperature (10s) 300 ºC
Operating Temperature Range -40 to +85 ºC
Note:
* Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
CAT1232LP, CAT1832
http://onsemi.com
2
CAT1232LP, CAT1832
© 2009 SCILLC. All rights reserved. 3 Doc. No. MD-3018 Rev. F
Characteristics subject to change without notice
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, 1.0 V - V
CC
- 5.5 V and over the operating temperature range of -40ºC to +85ºC.
All voltages are referenced to ground.
Symbol Parameter Conditions Min Typ Max Units
V
CC
Supply Voltage 1.0 5.5 V
V
CC
= 5.5 V, CAT1232LP 35 50
I
CC1
Supply Current
V
CC
= 3.6 V, CAT1832 20 35
µA
(5) 2
V
IH
ST and PBRST
¯¯¯¯¯¯
Input High
Level
(6) V
CC
- 0.4 V
V
CC
+ 0.3 V V
V
CC
= 5.5 V, CAT1232LP -0.3 0.8
V
IL
ST and PBRST
¯¯¯¯¯¯
Input Low
Level
V
CC
= 3.6 V, CAT1832 0.5
V
V
CCTP
V
CC
Trip Point (TOL = GND) CAT1232LP 4.50 4.62 4.74 V
V
CCTP
V
CC
Trip Point (TOL = V
CC
) CAT1232LP 4.25 4.37 4.49 V
V
CCTP
V
CC
Trip Point (TOL = GND) CAT1832 2.80 2.88 2.97 V
V
CCTP
V
CC
Trip Point (TOL = V
CC
) CAT1832 2.47 2.55 2.64 V
t
TD
Watchdog Time-Out Period TD = GND 62.5 150 250 ms
t
TD
Watchdog Time-Out Period TD = V
CC
500 1200 2000 ms
t
TD
Watchdog Time-Out Period TD floating 250 600 1000 ms
V
OH
Output Voltage I = -500 µA
(3)
V
CC
-0.5 V V
CC
-0.1 V V
I
OH
Output Current Output = 2.4 V
(2)
-350 µA
I
OL
Output Current Output = 0.4 V 10 mA
I
IL
Input Leakage (1) -1.0 1.0 µA
R
PU
Internal Pull-Up Resistor (1) 32 40 55 kΩ
C
IN
Input Capacitance 5 pF
C
OUT
Output Capacitance 7 pF
t
PB
PBRST
¯¯¯¯¯¯
Manual Reset
Minimum Low Time
PBRST
¯¯¯¯¯¯
= V
IL
20 ms
t
RST
Reset Active Time 250 600 1000 ms
t
ST
ST
¯¯
Pulse Width
(4) 20 ns
t
RPD
V
CC
Fail Detect to RESET or
RESET
¯¯¯¯¯¯
5 8 µs
t
F
V
CC
Slew Rate 20 µs
t
PDLY
PBRST
¯¯¯¯¯¯
Stable LOW to RESET
and RESET
¯¯¯¯¯¯
Active
20 ms
t
RPU
V
CC
Detect to RESET or
RESET
¯¯¯¯¯¯
Inactive
t
RISE
= 5 µs 250 600 1000 ms
t
R
V
CC
Slew Rate 4.25 V to 4.75 V 0 ns
Notes:
(1) PBRST
¯¯¯¯¯¯
is internally pulled HIGH to V
CC
through a nominal 40 kΩ resistor (RPU).
(2) RESET
¯¯¯¯¯¯
is an open drain output on the CAT1232LP.
(3) RESET remains within 0.5 V of V
CC
on power-down until V
CC
falls below 2 V. RESET remains within 0.5 V of ground on power-down until
V
CC
falls below 2.0 V.
(4) Must not exceed the minimum watchdog time-out period (t
TD
). The watchdog circuit cannot be disabled. To avoid a reset, ST
¯¯
must be
strobed.
(5) Measured with V
CC
≥ 2.7 V.
(6) Measured with V
CC
< 2.7 V.
CAT1232LP, CAT1832
http://onsemi.com
3
P1-P3P4-P6P7-P9P10-P11

CAT1232LPZ-GT3

Mfr. #:
Buy CAT1232LPZ-GT3
Manufacturer:
ON Semiconductor
Description:
Supervisory Circuits SUP 5 V
Lifecycle:
New from this manufacturer.
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