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95V842AFLF
P1-P3
P4-P6
P7-P9
7
ICS95V842
0830B—11/24/08
(N is a large number of samples)
t
(
) n+1
t
()
n
t
()
=
1
n=
N
t
()
n
N
CLK_INC
CLK_INT
FB_INC
FB_INT
t
(SK_O)
Y
#
X
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Y
X
Parameter Measurement Information
Figure 4. St
atic Phase Offset
Figure 5. Output
Skew
1
f
O
t
=
t
-
(jit_per)
C(n)
1
f
O
Figure 6. Period Jitter
8
ICS95V842
0830B—11/24/08
Clock
Inputs
and
Outputs
80%
20%
80%
20%
Rise t
sl
Fall t
sl
V
ID
,V
OD
Figure 8. Input and Output Slew Rates
Parameter Measurement
Information
t
(hper_n)
t
(hper_n+1)
1
f
o
Y
, FB_OUTC
X
Y
, FB_OUTT
X
Figure 7. Half-Period Jitter
t
=-
(jit_Hper)
t
(jit_Hper_n)
1
2xf
O
9
ICS95V842
0830B—11/24/08
MIN
MAX
MIN
MAX
A
1
.
3
51
.
7
5
.
0
5
3.
0
6
9
A
1
0.
10
0.
25
.
004
.010
A
2
--
1.
50
--
.
059
b
0
.
2
00
.
3
0
.
0
0
8.
0
1
2
c
0
.
1
80
.
2
5
.
0
0
7.
0
1
0
D
E
5
.
8
06
.
2
0
.
2
2
8.
2
4
4
E
1
3.
80
4.
00
.
150
.157
e
L
0
.
4
01
.
2
7
.
0
1
6.
0
5
0
N
a
0
°8
°0
°8
°
ZD
V
A
RI
A
T
I
O
NS
ZD
ZD
MIN
MAX
(
Re
f)
MIN
MAX
(
R
ef)
16
4.
80
5.
00
0.
23
.189
.
197
.
009
10-0032
I
n Mi
l
l
im
et
ers
I
n I
nc
hes
COM
M
O
N DI
M
E
NS
I
O
NS
Ref
erenc
e Doc.
:
J
EDE
C P
ublicat
ion 95,
M
O
-137
SEE VAR
IAT
ION
S
0.
635 B
A
S
I
C
0.
025 B
A
S
IC
C
OMMO
N
D
IMENSION
S
16-Lead,
150 m
i
l
S
S
OP
(QS
OP
)
N
SEE VAR
IATIO
N
S
SEE VAR
IATIO
N
S
D (inc
h)
SEE VAR
IATIO
N
S
SEE VAR
IATIO
N
S
D m
m
.
SYMBOL
SEE VAR
IATIO
N
S
Ordering Information
95V842
y
F
z
LF-T
XXXX
y
F
z
LF -
T
Designation for tape and reel packaging
Lead Free, RoHS Compliant (Optional)
T
emperature Grade
Blank = 0°C to +85°C (Commercial)
I = -40°C to +85°C (Industrial)
Pa
ckage T
ype
F=SSOP
Revision Designator
(will not correlate with datasheet revision)
Device T
ype
P1-P3
P4-P6
P7-P9
95V842AFLF
Mfr. #:
Buy 95V842AFLF
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 2.5V PHASE LOCK LOOP CLOCK
Lifecycle:
New from this manufacturer.
Delivery:
DHL
FedEx
Ups
TNT
EMS
Payment:
T/T
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Union
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