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LTC1148CN-5#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
7
LTC1148
LTC1148-3.3/LTC1148-5
114835fd
OPERATIO
U
The LTC1148 series uses a current mode, constant off-
time architecture to synchronously switch an external
pair of complementary power MOSFETs. Operating fre-
quency is set by an external capacitor at the timing
capacitor Pin 4.
The output voltage is sensed by an internal voltage
divider connected to SENSE
–
Pin 7 (LTC1148-3.3 and
LTC1148-5) or external divider returned to V
FB
Pin 9
(LTC1148). A voltage comparator V, and a gain block G,
compare the divided output voltage with a reference
voltage of 1.25V. To optimize efficiency, the LTC1148
series automatically switches between two modes of
operation, burst and continuous. The voltage compara-
tor is the primary control element when the device is in
Burst Mode
operation, while the gain block controls the
output voltage in continuous mode.
During the switch “ON” cycle in continuous mode, current
comparator C monitors the voltage between Pins 7 and 8
connected across an external shunt in series with the
inductor. When the voltage across the shunt reaches its
threshold value, the P-drive output is switched to V
IN
,
turning off the P-channel MOSFET. The timing capacitor
connected to Pin 4 is now allowed to discharge at a rate
determined by the off-time controller. The discharge cur-
rent is made proportional to the output voltage (measured
by Pin 7) to model the inductor current, which decays at
a rate which is also proportional to the output voltage.
While the timing capacitor is discharging, the N-drive
output goes to V
IN
, turning on the N-channel MOSFET.
When the voltage on the timing capacitor has discharged
past V
TH1
, comparator T trips, setting the flip-
flop. This
causes the N-drive output to go low (turning off the N-
channel MOSFET) and the P-drive output to also go low
(turning the P-channel MOSFET back on). The cycle
then repeats.
As the load current increases, the output voltage de-
creases slightly. This causes the output of the gain stage
(Pin 6) to increase the current comparator threshold, thus
tracking the load current.
The sequence of events for Burst Mode
operation is very
similar to continuous operation with the cycle interrupted
by the voltage comparator. When the output voltage is at
or above the desired regulated value, the P-channel MOSFET
is held off by comparator V and the timing capacitor
continues to discharge below V
TH1
. When the timing
capacitor discharges past V
TH2
, voltage comparator S
trips, causing the internal sleep line to go low and the N-
channel MOSFET to turn off.
The circuit now enters sleep mode with both power
MOSFETs turned off. In sleep mode, a majority of the
circuitry is turned off, dropping the quiescent current
from 1.6mA to 160µA. The load current is now being
supplied from the output capacitor. When the output
voltage has dropped by the amount of hysteresis in
comparator V, the P-channel MOSFET is again turned on
and the process repeats.
To avoid the operation of the current loop interfering with
Burst Mode
operation, a built-in offset (V
OS
) is incorpo-
rated in the gain stage. This prevents the current compara-
tor threshold from increasing until the output voltage has
dropped below a minimum threshold.
To prevent both the external MOSFETs from ever being
turned on at the same time, feedback is incorporated to
sense the state of the driver output pins. Before the
N-drive output can go high, the P-drive output must also
be high. Likewise, the P-drive output is prevented from
going low while the N-drive output is high.
Using constant off-time architecture, the operating fre-
quency is a function of the input voltage. To minimize the
frequency variation as dropout is approached, the off-time
controller increases the discharge current as V
IN
drops
below V
OUT
+ 1.5V. In dropout the P-channel MOSFET is
turned on continuously (100% duty cycle), providing
extremely low dropout operation.
8
LTC1148
LTC1148-3.3/LTC1148-5
114835fd
APPLICATIO S I FOR ATIO
WUU U
The basic LTC1148 series application circuit (fixed
output versions) is shown in Figure 1. External compo-
nent selection is driven by the load requirement, and
begins with the selection of R
SENSE
. Once R
SENSE
is
known, C
T
and L can be chosen. Next, the power
MOSFETs and D1 are selected. Finally, C
IN
and C
OUT
are
selected and the loop is compensated. The circuit
shown in Figure 1 can be configured for operation up to
an input voltage of 20V. If the application requires
higher input voltage, then the LTC1149 or LTC1159
should be used.
R
SENSE
Selection for Output Current
R
SENSE
is chosen based on the required output current.
The LTC1148 series current comparator has a threshold
range which extends from a minimum of 25mV/R
SENSE
to
a maximum of 150mV/R
SENSE
. The current comparator
threshold sets the peak of the inductor ripple current,
yielding a maximum output current I
MAX
equal to the peak
value less half the peak-to-peak ripple current. For proper
Burst Mode
operation, I
RIPPLE(P-P)
must be less than or
equal to the minimum current comparator threshold.
Since efficiency generally increases with ripple current,
the maximum allowable ripple current is assumed, i.e.,
I
RIPPLE(P-P)
= 25mV/R
SENSE
(See C
T
and L Selection for
Operating Frequency). Solving for R
SENSE
and allowing
a margin for variations in the LTC1148 series and
external component values yields:
R
SENSE
=
100mV
I
MAX
A graph for selecting R
SENSE
versus maximum output
current is given in Figure 2.
The load current below which Burst Mode
operation com-
mences (I
BURST
) and the peak short-circuit current (I
SC(PK)
)
both track I
MAX
. Once R
SENSE
has been chosen, I
BURST
and
I
SC(PK)
can be predicted from the following:
I
BURST
≈
15mV
R
SENSE
I
SC(PK)
=
150mV
R
SENSE
Figure 2. Selecting R
SENSE
MAXIMUM OUTPUT CURRENT (A)
0
R
SENSE
(Ω)
0.15
0.20
4
LTC1148 • F02
0.10
0.05
0
1
2
3
5
The LTC1148 series automatically extends t
OFF
during a
short circuit to allow sufficient time for the inductor
current to decay between switch cycles. The resulting
ripple current causes the average short-circuit current
I
SC(AVG)
to be reduced to approximately I
MAX
.
L and C
T
Selection for Operating Frequency
The LTC1148 series uses a constant off-time architecture
with t
OFF
determined by an external timing capacitor C
T
.
Each time the P-channel MOSFET switch turns on, the
voltage on C
T
is reset to approximately 3.3V. During the off
time, C
T
is discharged by a current which is proportional
to V
OUT
. The voltage on C
T
is analogous to the current in
inductor L, which likewise decays at a rate proportional to
V
OUT
. Thus the inductor value must track the timing
capacitor value.
The value of C
T
is calculated from the desired continuous
mode operating frequency, f:
C
T
=
1
2.6(10
4
)f
Assumes V
IN
= 2V
OUT
, Figure 1 circuit.
A graph for selecting C
T
versus frequency including the
effects of input voltage is given in Figure 3.
As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The complete expression for operating
frequency of the circuit in Figure 1 is given by:
9
LTC1148
LTC1148-3.3/LTC1148-5
114835fd
APPLICATIO S I FOR ATIO
WUU U
Inductor Core Selection
Once the minimum value for L is known, the type of
inductor must be selected. The highest efficiency will be
obtained using ferrite, Kool Mµ
®
on molypermalloy (MPP)
cores. Lower cost powdered iron cores provide suitable
performance but cut efficiency by 3% to 7%. Actual core
loss is independent of core size for a fixed inductor value,
but it is very dependent on inductance selected. As induc-
tance increases, core losses go down. Unfortunately,
increased inductance requires more turns of wire and
therefore copper losses increase.
Ferrite designs have very low core loss, so design goals
can concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple which can cause Burst Mode
operation to be falsely
triggered. Do not allow the core to saturate!
Kool Mµ (from Magnetics, Inc.) is a very good, low loss
core material for toroids, with a “soft” saturation charac-
teristic. Molypermalloy is slightly more efficient at high
(>200kHz) switching frequencies, but quite a bit more
expensive. Toroids are very space efficient, especially
when you can use several layers of wire. Because they
generally lack a bobbin, mounting is more difficult. How-
ever, new designs for surface mount are available from
Coiltronics and Beckman Industrial Corp. which do not
increase the height significantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for use
with the LTC1148 series: a P-channel MOSFET for the
main switch, and an N-channel MOSFET for the synchro-
nous switch. The main selection criteria for the power
MOSFETs are the threshold voltage V
GS(TH)
and on resis-
tance R
DS(ON)
.
The minimum input voltage determines whether standard
threshold or logic-level threshold MOSFETs must be used.
For V
IN
> 8V, standard threshold MOSFETs (V
GS(TH)
< 4V)
may be used. If V
IN
is expected to drop below 8V, logic-
FREQUENCY (kHz)
0
0
CAPACITANCE (pF)
200
400
600
100
200
LTC1148 • F03
800
1000
300
V
SENSE
–
= V
OUT
= 5V
V
IN
= 12V
V
IN
= 10V
V
IN
= 7V
Figure 3. Timing Capacitor Value
f =
1
t
OFF
)
)
1 –
V
OUT
V
IN
where:
t
OFF
= 1.3(10
4
)C
T
)
)
V
REG
V
OUT
V
REG
is the desired output voltage (i.e., 5V, 3.3V). V
OUT
is
the measured output voltage. Thus V
REG
/V
OUT
= 1 in
regulation.
Note that as V
IN
decreases, the frequency decreases.
When the input to output voltage differential drops
below 1.5V, the LTC1148 series reduces t
OFF
by in-
creasing the discharge current in C
T
. This prevents
audible operation prior to dropout.
Once the frequency has been set by C
T
, the inductor L
must be chosen to provide no more than 25mV/R
SENSE
of peak-to-peak inductor ripple current. This results in
a minimum required inductor value of:
L
MIN
= 5.1(10
5
)R
SENSE
(C
T
)V
REG
As the inductor value is increased from the minimum
value, the ESR requirements for the output capacitor
are eased at the expense of efficiency. If too small an
inductor is used, the inductor current will decrease past
zero and change polarity.
A consequence of this is that
the LTC1148 series may not enter Burst Mode
operation
and efficiency will be severely degraded at low currents.
Kool Mµ
is a registered trademark of Magnetics, Inc.
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LTC1148CN-5#PBF

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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Hi Eff Sync Buck Sw Regs
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