AD605
Rev. F | Page 15 of 24
35
30
25
20
15
10
5
0
–5
–10
–15
–20
GAIN (dB)
40dB/V 30dB/V 20dB/V
LINEAR-IN-dB RANGE
OF AD605
1.00.5 1.5 2.0 2.5 3.0
GAIN CONTROL VOLTAGE
0
0541-038
Figure 37. Ideal Gain Curves vs. V
REF
Usable gain control voltage ranges are 0.1 V to 2.9 V for the
20 dB/V scale and 0.1 V to 1.45 V for the 40 dB/V scale. VGN
voltages of less than 0.1 V are not used for gain control because
below 50 mV the channel is powered down. This can be used to
conserve power and at the same time gate-off the signal. The
supply current for a powered-down channel is 1.9 mA, and the
response time to power the device on or off is less than 1 µs.
FIXED GAIN AMPLIFIER AND INTERPOLATOR
CIRCUITS—APPLYING AN ACTIVE FEEDBACK
AMPLIFIER
A typical X-amp architecture is powered by a dual polarity
power supply. Because the AD605 operates from a single supply, a
supply common equal to half the value of the supply voltage is
required. An active feedback amplifier (AFA) is used to provide
a differential input and to implement the feedback loop. The
AFA in the AD605 is an op amp with two g
m
stages; one is used
in the feedback path, and the other is used as a highly linear
differential input.
A multisection distributed g
m
stage senses the voltages on the
ladder network, one stage for each of the ladder nodes. Only a
few of the stages are active at any time and are dependent on the
gain control voltage.
The AFA makes a differential input structure possible because
one of its inputs (G1) is fully differential; this input is made
up of a distributed g
m
stage. The second input (G2) is used for
feedback. The output of G1 is some function of the voltages
sensed on the attenuator taps that is applied to a high gain
amplifier (A0). Because of negative feedback, the differential
input to the high gain amplifier is zero; this in turn implies that
the differential input voltage to G2 times g
m2
(the transconductance
of G2) is equal to the differential input voltage to G1 times g
m1
(the transconductance of G1). Therefore, the overall gain
function of the AFA is
R2
R2R1
g
g
V
V
m
m
ATTEN
OUT
×
×=
2
1
(7)
where:
V
OUT
is the output voltage.
V
AT TEN
is the effective voltage sensed on the attenuator.
(
R1 + R2)/R2 = 42.
g
m1
/g
m2
= 1.25; the overall gain is therefore 52.5 (34.4 dB).
The AFA has additional features that include the following:
inverting the output signal by switching the positive and negative
input to the ladder network; the possibility of using the −IN
input as a second signal input; and independent control of the
DSX common-mode voltage. Under normal operating conditions,
it is best to connect a decoupling capacitor to Pin VOCM, in
which case, the common- mode voltage of the DSX is half of
the supply voltage; this allows for maximum signal swing.
Nevertheless, the common-mode voltage can be shifted up or
down by directly applying a voltage to VOCM. It can also be
used as another signal input, the only limitation being the
rather low slew rate of the VOCM buffer.
If the dc level of the output signal is not critical, another coupling
capacitor is normally used at the output of the DSX; again, this
is done for level shifting and to eliminate any dc offsets contributed
by the DSX (see the AC Coupling section).
The gain range of the DSX is programmable by a resistor connected
between Pin FBK and Pin OUT. The possible ranges are −14 dB to
+34.4 dB when the pins are shorted together or 0 dB to +48.4 dB
when FBK is left open. For the higher gain range, the bandwidth
of the amplifier is reduced by a factor of five to about 8 MHz
because the gain increased by 14 dB. This is the case for any
constant gain bandwidth product amplifier that includes the
active feedback amplifier.
AD605
Rev. F | Page 16 of 24
APPLICATIONS INFORMATION
The basic circuit in Figure 38 shows the connections for one
channel of the AD605 with a gain range of −14 dB to +34.4 dB.
The signal is applied at +IN1. The ac coupling capacitors before
Pin −IN1 and Pin +IN1 should be selected according to the
required lower cutoff frequency. In this example, the 0.1 µF
capacitors, together with the 175 Ω of each of the DSX input
pins, provide a −3 dB high-pass corner of about 9.1 kHz. The
upper cutoff frequency is determined by the amplifier and is
40 MHz.
14
13
12
11
16
15
10
9
8
1
2
3
4
7
6
5
VREF
GND1
+IN1
–IN1
VGN1
OUT1
FBK1
VPOS
–IN2
+IN2
GND2
VPOS
FBK2
OUT2
VOCM
VGN2
AD605
VGN
V
IN
0.1µF
0.1µF
0.1µF
5V
0.1µF
OUT
2.500V
0
0541-039
Figure 38. Basic Connections for a Single Channel
As shown in Figure 38, the output is ac-coupled for optimum
performance. In the case of connecting to the 10-bit, 40 MSPS
ADC, AD9050, ac coupling can be eliminated as long as
Pin VOCM is biased by the same 3.3 V common-mode voltage
as the AD9050.
Pin VREF requires a voltage of 1.25 V to 2.5 V, with gain scaling
between 40 dB/V and 20 dB/V, respectively. Voltage VGN controls
the gain; its nominal operating range is from 0.25 V to 2.65 V
for 20 dB/V gain scaling and 0.125 V to 1.325 V for 40 dB/V
scaling. When this pin is taken to ground, the channel powers
down and disables its output.
CONNECTING TWO AMPLIFIERS TO DOUBLE THE
GAIN RANGE
Figure 39 shows the two channels of the AD605 connected in
series to provide a total gain range of 96.8 dB. When R1 and R2
are shorts, the gain range is from −28 dB to +68.8 dB with a
slightly reduced bandwidth of about 30 MHz. The reduction in
bandwidth is due to two identical low-pass circuits being connected
in series; in the case of two identical single-pole, low-pass filters,
the bandwidth is reduced by exactly √2. If R1 and R2 are
replaced by open circuits, that is, Pin FBK1 and Pin FBK2 are left
unconnected, the gain range shifts up by 28 dB to 0 dB to 96.8 dB.
As previously noted, the bandwidth of each individual channel is
reduced by a factor of 5 to about 8 MHz because the gain increased
by 14 dB. In addition, there is still the √2 reduction because the
series connection of the two channels results in a final
bandwidth of the higher gain version of about 6 MHz.
14
13
12
11
16
15
10
9
8
1
2
3
4
7
6
5
VREF
GND1
+IN1
–IN1
VGN1
OUT1
FBK1
VPOS
–IN2
+IN2
GND2
VPOS
FBK2
OUT2
VOCM
VGN2
AD605
C2
0.1µF
VGN
V
IN
R1
5V
OUT
2.500V
C1
0.1µF
C3
0.1µF
C4
0.1µF
C6
0.1µF
R2
C5
0.1µF
00541-040
Figure 39. Doubling the Gain Range with Two Amplifiers
Two other easy combinations are possible to provide a gain
range of −14 dB to +82.8 dB: make R1 a short and R2 an open,
or make R1 an open and R2 a short. The bandwidth for both of
these cases is dominated by the channel that is set to the higher
gain and is about 8 MHz. From a noise standpoint, the second
choice is the best because by increasing the gain of the first
amplifier, the noise of the second amplifier has less of an impact
on the total output noise. One further observation regarding
noise is that by increasing the gain, the output noise increases
proportionally; therefore, there is no increase in signal-to-noise
ratio. It actually stays fixed.
It should be noted that by selecting the appropriate values of R1
and R2, any gain range between −28 dB to +68.8 dB and 0 dB to
+96.8 dB can be achieved with the circuit in Figure 39. When
using any value other than shorts and opens for R1 and R2, the
final value of the gain range depends on the external resistors
matching the on-chip resistors. Because the internal resistors
can vary by as much as ±20%, the actual values for a particular
gain have to be determined empirically. Note that the two channels
within one part match quite well; therefore, R1 tracks R2 in
Figure 39.
C3 is not required because the common-mode voltage at
Pin OUT1 should be identical to the one at Pin +IN2 and
Pin −IN2. However, because only 1 mV of offset at the output
of the first DSX introduces an offset of 53 mV when the second
DSX is set to the maximum gain of the lowest gain range (34.4 dB),
and 263 mV when set to the maximum gain of the highest gain
range (48.4 dB), it is important to include ac coupling to get the
maximum dynamic range at the output of the cascaded amplifiers.
C5 is necessary if the output signal needs to be referenced to any
common-mode level other than half of the supply as is provided
by Pin OUT2.
AD605
Rev. F | Page 17 of 24
Figure 40 shows the gain vs. VGN for the circuit in Figure 39
at 1 MHz and the lowest gain range (−14 dB to +34.4 dB). Note
that the gain scaling is 40 dB/V, double the 20 dB/V of an
individual DSX; this is the result of the parallel connection of
the gain control inputs, VGN1 and VGN2. The gain can also be
sequentially increased by first increasing the gain of Channel 1
and then Channel 2. In this case, VGN1 and VGN2 are driven
from separate voltage sources, for instance two separate DACs.
Figure 41 shows the gain error of Figure 39.
80
–40
f = 1MHz
ACTUAL
0
70
20
–10
–20
–30
50
30
60
40
10
00541-041
VGN (V)
GAIN (dB)
THEORETICAL
0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9
Figure 40. Gain vs. VGN for the Circuit in Figure 39
VGN (V)
GAIN ERROR (dB)
4
3
–4
0
–1
–2
–3
2
1
f = 1MHz
00541-042
0.2 0.7 1.2 1.7 2.2 2.7
Figure 41. Gain Error vs. VGN for the Circuit in Figure 39

AD605ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Special Purpose Amplifiers Dual Low Noise SGL-Supply VGA
Lifecycle:
New from this manufacturer.
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