1. Description
The ATmega328PB is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATmega328PB achieves
throughputs close to 1MIPS per MHz. This empowers system designer to optimize the device for power
consumption versus processing speed.
The core combines a rich instruction set with 32 general purpose working registers. All the 32 registers
are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be
accessed in a single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega328PB provides the following features: 32Kbytes of In-System Programmable Flash with
Read-While-Write capabilities, 1Kbytes EEPROM, 2Kbytes SRAM, 27 general purpose I/O lines, 32
general purpose working registers, five flexible Timer/Counters with compare modes, internal and
external interrupts, two serial programmable USART, two byte-oriented 2-wire Serial Interface (I2C), two
SPI serial ports, a 8-channel 10-bit ADC in TQFP and QFN/MLF package, a programmable Watchdog
Timer with internal Oscillator, Clock failure detection mechanism and six software selectable power
saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire
Serial Interface, SPI port, and interrupt system to continue functioning. PTC with enabling up to 24 self-
cap and 144 mutual-cap sensors. The Power-down mode saves the register contents but freezes the
Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Power-save
mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest
of the device is sleeping. Also ability to run PTC in power-save mode/wake-up on touch and Dynamic
on/off of PTC analog and digital portion. The ADC Noise Reduction mode stops the CPU and all I/O
modules except asynchronous timer, PTC, and ADC to minimize switching noise during ADC
conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is
sleeping. This allows very fast start-up combined with low power consumption.
The device is manufactured using high density non-volatile memory technology. The On-chip ISP Flash
allows the program memory to be reprogrammed In-System through an SPI serial interface, by a
conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core.
The Boot program can use any interface to download the application program in the Application Flash
memory. Software in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the ATmega328PB is a powerful microcontroller that
provides a highly flexible and cost effective solution to many embedded control applications.
The ATmega328PB is supported with a full suite of program and system development tools including: C
Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits.
ATmega328PB
© 2017 Microchip Technology Inc.
Datasheet Summary
40001907A-page 4
