NE5230, SA5230, SE5230
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7
Output Stage
Processing output voltage swings that nominally reach to
less than 100 mV of either supply voltage can only be
achieved by a pair of complementary commonemitter
connected transistors. Normally, such a configuration
causes complex feedforward signal paths that develop by
combining biasing and driving which can be found in
previous low supply voltage designs. The unique output
stage of the NE5230 separates the functions of driving and
biasing, as shown in the simplified schematic of Figure 2 and
has the advantage of a shorter signal path which leads to
increasing the effective bandwidth.
This output stage consists of two parts: the Darlington
output transistors and the class AB control regulator. The
output transistor Q3 connected with the Darlington
transistors Q4 and Q5 can source up to 10 mA to an output
load. The output of NPN Darlington connected transistors
Q1 and Q2 together are able to sink an output current of
10 mA. Accurate and efficient class AB control is necessary
to insure that none of the output transistors are ever
completely cut off. This is accomplished by the differential
amplifier (formed by Q8 and Q9) which controls the biasing
of the output transistors. The differential amplifier compares
the summed voltages across two diodes, D1 and D2, at the
base of Q8 with the summed voltages across the
baseemitter diodes of the output transistors Q1 and Q3. The
baseemitter voltage of Q3 is converted into a current by Q6
and R6 and reconverted into a voltage across the
baseemitter diode of Q7 and R7. The summed voltage
across the baseemitter diodes of the output transistors Q3
and Q1 is proportional to the logarithm of the product of the
push and pull currents I
OP
and I
ON
, respectively. The
combined voltages across diodes D1 and D2 are
proportional to the logarithm of the square of the reference
current I
B1
. When the diode characteristics and
temperatures of the pairs Q1, D1 and Q3, Q2 are equal, the
relation I
OP
× I
ON
I
B1
× I
B1
is satisfied.
Separating the functions of biasing and driving prevents
the driving signals from becoming delayed by the biasing
circuit. The output Darlington transistors are directly
accessible for inphase driving signals on the bases of Q5
and Q2. This is very important for simple highfrequency
compensation. The output transistors can be highfrequency
compensated by Miller capacitors CM1A and CM1B
connected from the collectors to the bases of the output
Darlington transistors.
A generalpurpose op amp of this type must have enough
openloop gain for applications when the output is driving
a low resistance load. The NE5230 accomplishes this by
inserting an intermediate commonemitter stage between
the input and output stages. The three stages provide a very
large gain, but the op amp now has three natural dominant
poles one at the output of each commonemitter stage.
Frequency compensation is implemented with a simple
scheme of nested, polesplitting Miller integrators. The
Miller capacitors CM1A and CM1B are the first part of the
nested structure, and provide compensation for the output
and intermediate stages. A second pair of Miller integrators
provide polesplitting compensation for the pole from the
input stage and the pole resulting from the compensated
combination of poles from the intermediate and output
stages. The result is a stable, internallycompensated op
amp with a phase margin of 70°.
Q5
I
b1
I
b2
I
b3
I
b5
I
b4
Q4
Q6
Q8 Q9
D1
Q7
Q3
D2
Q1
Q2
R7
R6
CM1B
CM1A
V
b2
V
b5
V
CC
V
EE
V
OUT
I
OP
I
ON
Figure 2. Output Stage
NE5230, SA5230, SE5230
http://onsemi.com
8
THERMAL CONSIDERATIONS
When using the NE5230, the internal power dissipation
capabilities of each package should be considered.
ON Semiconductor does not recommend operation at die
temperatures above 110°C in the SO package because of its
inherently smaller package mass. Die temperatures of
150°C can be tolerated in all the other packages. With this
in mind, the following equation can be used to estimate the
die temperature:
T
j
+ T
amb
) (P
D
q
JA
)
(eq. 1)
Where
T
amb
= Ambient Temperature
T
j
= Die Temperature
P
D
= Power Dissipation
= (I
CC
x V
CC
)
q
JA
= Package Thermal Resistance
= 270°C/W for SO8 in PC Board Mounting
See the packaging section for information regarding other
methods of mounting.
q
JA
100°C/W for the plastic DIP.
The maximum supply voltage for the part is 15 V and the
typical supply current is 1.1 mA (1.6 mA max). For
operation at supply voltages other than the maximum, see
the data sheet for I
CC
versus V
CC
curves. The supply current
is somewhat proportional to temperature and varies no more
than 100 mA between 25°C and either temperature extreme.
Operation at higher junction temperatures than that
recommended is possible but will result in lower Mean Time
Between Failures (MTBF). This should be considered
before operating beyond recommended die temperature
because of the overall reliability degradation.
DESIGN TECHNIQUES AND APPLICATIONS
The NE5230 is a very userfriendly amplifier for an
engineer to design into any type of system. The supply
current adjust pin (Pin 5) can be left open or tied through a
pot or fixed resistor to the most negative supply (i.e., ground
for single supply or to the negative supply for split supplies).
The minimum supply current is achieved by leaving this pin
open. In this state it will also decrease the bandwidth and
slew rate. When tied directly to the most negative supply, the
device has full bandwidth, slew rate and I
CC
. The
programming of the currentcontrol pin depends on the
tradeoffs which can be made in the designers application.
The graphs in Figures 3 and 4 will help by showing
bandwidth versus I
CC
. As can be seen, the supply current can
be varied anywhere over the range of 100 mA to 600 mA for
a supply voltage of 1.8 V. An external resistor can be
inserted between the current control pin and the most
negative supply. The resistor can be selected between 1.0 W
to 100 kW to provide any required supply current over the
indicated range. In addition, a small varying voltage on the
bias current control pin could be used for such exotic things
as changing the gainbandwidth for voltage controlled low
pass filters or amplitude modulation. Furthermore, control
over the slew rate and the rise time of the amplifier can be
obtained in the same manner. This control over the slew rate
also changes the settling time and overshoot in pulse
response applications. The settling time to 0.1% changes
from 5.0 ms at low bias to 2.0 ms at high bias. The supply
current control can also be utilized for waveshaping
applications such as for pulse or triangular waveforms. The
gainbandwidth can be varied from between 250 kHz at low
bias to 600 kHz at high bias current. The slew rate range is
0.08 V/ms at low bias and 0.25 V/ms at high bias.
Figure 3. Unity Gain Bandwidth vs. Power Supply
Current for V
CC
= ±0.9 V
Figure 4. I
CC
Current vs. Bias Current Adjusting
Resistor for Several Supply Voltages
800
700
600
500
400
300
200
100
100 200 300 400 500 600700
UNITY GAIN BANDWIDTH (kHz)
T
A
25°CV
CC
15V
V
CC
12V
V
CC
9V
V
CC
6V
V
CC
3V
V
CC
2V
V
CC
1.8V
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
10
0
10
1
10
2
10
3
10
4
10
5
R
ADJ
(W)
POWER SUPPLY CURRENT (mA)
I
CC
CURRENT (mA)
NE5230, SA5230, SE5230
http://onsemi.com
9
The full output power bandwidth range for V
CC
equals
2.0 V, is above 40 kHz for the maximum bias current setting
and greater than 10 kHz at the minimum bias current setting.
If extremely low signal distortion (<0.05%) is required at
low supply voltages, exclude the commonmode crossover
point (V
B1
) from the commonmode signal range. This can
be accomplished by proper bias selection or by using an
inverting amplifier configuration.
Most single supply designs necessitate that the inputs to
the op amp be biased between V
CC
and ground. This is to
assure that the input signal swing is within the working
commonmode range of the amplifier. This leads to another
helpful and unique property of the NE5230 that other CMOS
and bipolar low voltage parts cannot achieve. It is the simple
fact that the input commonmode voltage can go beyond
either the positive or negative supply voltages. This benefit
is made very clear in a noninverting voltagefollower
configuration. This is shown in Figure 5 where the input sine
wave allows an undistorted output sine wave which will
swing less than 100 mV of either supply voltage. Many
competitive parts will show severe clipping caused by input
commonmode limitations. The NE5230 in this
configuration offers more freedom for quiescent biasing of
the inputs close to the positive supply rail where similar op
amps would not allow signal processing.
There are not as many considerations when designing
with the NE5230 as with other devices. Since the NE5230
is internallycompensated and has a unity gainbandwidth
of 600 kHz, board layout is not so stringent as for very high
frequency devices such as the NE5205. The output
capability of the NE5230 allows it to drive relatively high
capacitive loads and small resistive loads. The power supply
pins should be decoupled with a lowpass RC network as
close to the supply pins as possible to eliminate 60 Hz and
other external power line noise, although the power supply
rejection ratio (PSRR) for the part is very high. The pinout
for the NE5230 is the same as the standard single op amp
pinout with the exception of the bias current adjusting pin.
V+
V
+
NE5230
OTHER
PARTS
V+
V
V+
V
V+
V
Figure 5. In a noninverting voltagefollower configuration, the NE5230 will give full railtorail swing.
Other low voltage amplifiers will not because they are limited by their input commonmode
range and output swing capability.

SA5230NG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Operational Amplifiers - Op Amps 1.8V Single Rail to Rail Industrial Temp
Lifecycle:
New from this manufacturer.
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