Electrical characteristics STUSBCD01B
10/19
6 Electrical characteristics
Note: 1 Specification applies to the following pins: /OE, SHUTDOWN, STATUS/METHOD
2 Specification applies to DEFAULT METHOD pin.
Table 8. DC electrical characteristics (power supply and digital I/O pins)
(1)
(V
BAT
= 4.2 V, T
A
= 25°C, specifications over temperature, -40 to 85 °C)
1. Characterized specification(s), but not production tested.
Symbol Parameter Test conditions Min. Typ. Max. Unit
1V8V LDO regulated voltage output
V
BUS
> V
TH_VBUS
, V
BAT
= 2.2V to
4.5V
1.76 1.8 1.84 V
I
BAT
V
BAT
supply current
V
BAT
= 2.2 to 4.5V; Standby mode 20 µA
V
BAT
= 2.2 to 4.5V; Detection 1 mA
I
IO
V
IO
supply current STATUS/METHOD=”open” 5 µA
V
TH_IO
V
IO
detection threshold voltage 1 V
V
IL
Low level input voltage
(Note 1)
V
IO
= 1.6 to 2.8V 0.15 V
IO
V
V
IH
High level input voltage
(Note 1)
V
IO
= 1.6 to 2.8V 0.85 V
IO
V
V
ILDM
Low level input voltage
(Note 2)
0.15 V
BAT
V
V
IHDM
High level input voltage
(Note 2)
0.85
V
BAT
V
I
IL
Low level input leakage
(SHUTDOWN, /OE)
V
IO
= 1.6 to 2.8V, all inputs at GND ±5 µA
I
IH
High level input leakage
(SHUTDOWN, /OE)
V
IO
= 1.6 to 2.8V, all inputs at V
IO
±5 µA
V
OL
Low level output voltage
(STATUS)
I
OL
= +10µA, V
IO
= 1.8V 0 100 mV
V
OH
High level output voltage
(STATUS)
I
OH
= -10µA, V
IO
= 1.8V 1.7 1.8 V
C
IN
Input capacitance (Note 1)4pF
STUSBCD01B Electrical characteristics
11/19
Table 9. DC electrical characteristics (analog pins)
(V
BAT
= 4.2 V, T
A
= 25 °C, specifications over temperature, -40 to 85 °C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
BUS
V
BUS
voltage 0 5.25 V
I
VBUS
V
BUS
current V
BUS
=0 to 5.25V 10 µA
V
BUS_CLMP
V
BUS
clamping voltage R
EXT
= 470Ω 5.3 6 V
V
TH_VBUS
V
BUS
voltage detection threshold 2 4 V
Z
IN_VBUS
V
BUS
input impedance V
BUS
max 5.25V 400 kΩ
C
IN
DP, DM input capacitance 5 pF
V
DAT_SRC
Data source voltage
(1)
I
DP
=I
DAT_SRC
(2)
0.615 0.65 0.7 V
V
DAT_REF
Data detect voltage 0.25 0.34 V
I
DAT_SINK
Data sink current V
DM
=V
DAT_SINK
(3)
50 100 µA
I
DCH_SRC
Dedicated charger detection DP
source current
15 30 µA
V
THDPL
DP low threshold 0.6 V
Z
PD_DET
DETECT pin pull down impedance /OE=1 240 300 360 kΩ
V
OH_DET
DETECT output driving voltage
I
OH_DET
= 0.5mA,
V
BAT
= 2.2 to 4.5V
V
BAT
–0.2 V
BAT
V
1. Measured at DP pin. Includes effect of internal switches.
2. I
DAT_SRC
= 0 to 200 µA according to USB specs.
3. V
DAT_SINK
= 0.15 V to 3.6 V according to USB specs.
Table 10. AC electrical characteristics
(1)
(V
BAT
= 4.2 V, T
A
= 25 °C, specifications over temperature, -40 to 85 °C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
VBUS_DBNC
V
BUS
debounce time 5 8 ms
T
DP_SRC_ON
DP source on time Current sink method 100 170 ms
T
CHGR_DET_DBNC
Charger detect debounce Current sink method 20 40 ms
T
DPSRC_HICRNT
DP source off to DETECT high
time
Current sink method 40 70 ms
T
D_VDAT
V
DAT_SRC
on delay Current sink method 5 8 ms
T
VBUS_DET_CS
V
BUS
attach to DETECT high time Current sink method 150 270 ms
T
VBUS_DET_DC
V
BUS
attach to DETECT high time Dedicated charger method 145 248 ms
T
IDCH_SRC_ON
I
DCH_SRC
on time
(2)
Dedicated charger method 140 240 ms
T
IDAT_SINK_ON
I
DAT_SINK
on time Dedicated charger method 40 70 ms
T
D_IDAT_SINK
I
DCH_SRC
on to I
DAT_SINK
on delay Dedicated charger method 100 170 ms
T
PER_DET
Periodic detection period
Hardware detection, No
charger
11.6s
T
W_H/L
Minimum pulse width High/Low All digital inputs 2 µs
1. All AC parameters guaranteed by design but not production tested.
2. T
IDCH_SRC_ON
= T
D_IDAT_SINK
+ T
IDAT_SINK_ON
Timing diagrams STUSBCD01B
12/19
7 Timing diagrams
Figure 4. Current sink method (with charger connected)
<20ms
V
BUS+
V
DAT_SRC
Applied to DP
V
BUS
V
BUS-
T
VBUS_DBNC
I
DAT_SINK
Applied to DM
V
DAT_DET
DETECT
T
DM_SRC_EN
0.615-0.7V
50-100µA
T
DPSRC_HICRNT
5ms
>100ms
T
DP_SRC_ON
>40ms
T
CHGR_DET_DBNC
>20ms
T
VBUS_DBNC
5ms
150ms < T
VBUS_DET_CS
< 270ms
DM_SRC
Either returned V
DAT_SRC
if
dedicated charger or applied
V
DAT_SRC
by HOST charger
<20ms
T
DM_SRC_DIS
V
DAT_DET
(comparator
output, see Functional
Diagram) must be high
for >20ms for charger
detection to be valid
T
D_VDAT
5ms
<20ms
V
BUS+
V
DAT_SRC
Applied to DP
V
BUS
V
BUS-
T
VBUS_DBNC
I
DAT_SINK
Applied to DM
V
DAT_DET
DETECT
T
DM_SRC_EN
0.615-0.7V
50-100µA
T
DPSRC_HICRNT
5ms
>100ms
T
DP_SRC_ON
>40ms
T
CHGR_DET_DBNC
>20ms
T
VBUS_DBNC
5ms
150ms < T
VBUS_DET_CS
< 270ms
DM_SRC
Either returned V
DAT_SRC
if
dedicated charger or applied
V
DAT_SRC
by HOST charger
<20ms
T
DM_SRC_DIS
V
DAT_DET
(comparator
output, see Functional
Diagram) must be high
for >20ms for charger
detection to be valid
T
D_VDAT
5ms

STUSBCD01BJR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
USB Interface IC USB charger detection interface
Lifecycle:
New from this manufacturer.
Delivery:
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