Dual-Channel, 14-Bit CCD Signal
Processor with Precision Timing™ Core
AD9973
Rev. SpA
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FEATURES
1.8 V analog and digital core supply voltage
Serial data link with reduced range LVDS outputs
Correlated double sampler (CDS) with −3 dB, 0 dB, +3 dB,
+6 dB gain
6 dB to 42 dB, 10-bit variable gain amplifier (VGA)
14-bit, 65 MHz analog-to-digital converter
Black level clamp with variable level control
Complete on-chip timing generator
Precision Timing core with 240 ps resolution @ 65 MHz
On-chip 3 V horizontal and RG drivers
6 mm × 6 mm, 84-ball CSP_BGA package
APPLICATIONS
Professional HDTV camcorders
Professional, high-end digital cameras
Broadcast cameras
Industrial high speed cameras
GENERAL DESCRIPTION
The AD9973 is a highly integrated dual channel CCD signal
processor for high speed digital video camera applications.
Each channel is specified at pixel rates of up to 65 MHz, and
consists of a complete analog front end with analog-to-digital
conversion, combined with a programmable timing driver. The
Precision Timing core allows adjustment of high speed clocks
with 240 ps resolution at 65 MHz operation. The AD9973 also
contains a reduced range LVDS interface for the dual-channel
data outputs.
Each analog front end (AFE) includes black level clamping,
CDS, VGA, and a 65 MSPS, 14-bit analog-to-digital converter.
The timing driver provides the high speed CCD clock drivers for
RG, HL, and H1 to H4. Operation is programmed using a
3-wire serial interface.
Packaged in a space-saving 6 mm × 6 mm, 84-ball CSP_BGA,
the AD9973 is specified over an operating temperature range of
−25°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
AD9973
SYNC
GENERATOR
PRECISION
TIMING
CORE
INTERNAL CLOCKS
HORIZONTAL
DRIVERS
RG_B
RG_A
HLA, H1A TO H4A
5
HLB, H1B TO H4B
5
HD_A VD_AHL_A HL_B HD_B VD_B
INTERNAL
REGISTERS
SL_A
SDATA_A SL_B SDATA_B
SCK_A
SCK_B
CLI_A
CLI_B
CLAMP
CCDINP_A
6dB
~
42dB
VGA
CDS
CLAMP
CCDINP_B
LDO_OUT_A
LDO_OUT_B
6dB
~
42dB
VGA
CDS
REFT_B REFB_B
VREF_B
REFT_A REFB_A
VREF_A
–3dB, 0dB,
+3dB, +6dB
–3dB, 0dB,
+3dB, +6dB
1.8V OUTPUT
LDO A
1.8V OUTPUT
LDO B
REDUCED
RANGE
LVDS
INTERFACE
DOUT0N_A
DOUT0P_A
DOUT1P_A
DOUT1N_A
DOUT0P_B
DOUT0N_B
DOUT1P_B
DOUT1N_B
TCLKP_A
TCLKN_A
TCLKP_B
TCLKN_B
CCDINM_A
CCDINM_B
ADC
6055-001
ADC
Figure 1.
For more information about the AD9973, contact Analog Devices, Inc. via email at afe.ccd@analog.com.
