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ISL6376
EAPP Hybrid Digital 6-Phase Green PWM Controller for Digital Power Management of Core and
Memory With AUTO Phase Shedding
TYPICAL DIAGRAMKEY FEATURES
• Intel VR12.5/VR12 compliant
• SerialVID with programmable IMAX, TMAX, BOOT, ADDRESS OFFSET registers
• VR12.5 core and VR12/VR12.5 memory
• Intersil’s proprietary
EAPP Hybrid Digital Enhanced Active Pulse Positioning (EAPP) Modulation
Scheme (Patented)
• SMBus/PMBus/I
2
C interface with SVID conflict free
• NVM and firmware free for low cost and easy use
• Auto phase shedding option for
greener environment
• Variable frequency control during load transients to reduce beat frequency oscillation
• Linear control with evenly distributed PWM pulses for better phase current balance during load
transients
• Voltage feed-forward and ramp adjustable options
• High frequency and PSI compensation options
• Proprietary active phase adding and dropping with diode emulation scheme for enhanced light
load efficiency
• 1 to 6-phase with phase doubler compatibility
• Differential remote voltage sensing
• ±0.5% closed-loop system accuracy over load, line and temperature
• Programmable 1 or 2-phase operation in PSI1 mode
• Programmable slew rate of fast dynamic VID with Dynamic VID Compensation (DVC)
• Droop and diode emulation options
• Precision resistor or DCR differential current sensing
• Integrated programmable current sense resistors
• Accurate load-line (droop) programming
• Accurate current monitoring and channel-current balancing
• True Catastrophic Failure Protection (CFP)
• Average overcurrent protection and channel current limit with internal current comparators
• Precision overcurrent protection on IMON pin
• Output voltage open sensing protection
• Protection disable option
• Accurate load-line (droop) programming
• Up to 2MHz per phase
• Thermal monitoring and integrated compensation
• Start-up into pre-charged load
• Pb-free (RoHS compliant)
DESCRIPTION
The ISL6376 is an
EAPP Hybrid Digital 6-Phase PWM controller and is designed to be compliant to Intel VR12.5/VR12 specifications and control the
microprocessor core or memory voltage regulator. It includes programmable functions and telemetries for easy use, high system flexibility and overclocking
applications using SMBus, PMBus, or I
2
C interface, which is designed to be conflict free with CPU’s SVID bus. This hybrid digital approach eliminates the
need of NVM and Firmware often seen in a full digital solution and significantly reduces design complexity, inventory and manufacturing costs.
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