5©2016 Integrated Device Technology, Inc. Revison B, February 8, 2016
850S1201 Datasheet
Table 4C. LVCMOS/LVTTL DC Characteristics, V
DD
= 3.3V ± 5% or 2.5V ± 5%, T
A
= -40°C to 85°C
NOTE 1: Output terminated with 50 to V
DD
/2. See Parameter Measurement Information section. Load Test Circuit diagrams.
AC Electrical Characteristics
Table 5A. AC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from V
DD
/2 of the input to V
DD
/2 of the output.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defined according with JEDEC Standard 65.
NOTE 4: Input duty cycle must be 50%.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input
High Voltage
V
DD
= 3.465V 2 V
DD
+ 0.3 V
V
DD
= 2.625V 1.7 V
DD
+ 0.3 V
V
IL
Input
Low Voltage
V
DD
= 3.465V -0.3 0.8 V
V
DD
= 2.625V -0.3 0.7 V
I
IH
Input
High Current
CLK[0:11],
CLK_SEL[0:3]
V
DD
= V
IN
= 3.465V or 2.625V 150 µA
OE V
DD
= V
IN
= 3.465V or 2.625V 10 µA
I
IL
Input
Low Current
CLK[0:11],
CLK_SEL[0:3]
V
DD
= 3.465V or 2.625V, V
IN
= 0V -10 µA
OE V
DD
= 3.465V or 2.625V, V
IN
= 0V -150 µA
V
OH
Output High Voltage; NOTE 1
V
DD
= 3.3V ± 5%, I
OH
= -12mA 2.6 V
V
DD
= 2.5V ± 5%, I
OH
= -12mA 1.8 V
V
OL
Output Low Voltage; NOTE 1
V
DD
= 3.3V ± 5% or 2.5V ± 5%,
I
OL
= 12mA
0.5 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
tp
LH
Propagation Delay, Low-to-High;
NOTE 1
1.4 2.7 ns
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
155.52MHz, Integration
Range: 12kHz – 20MHz
0.35 ps
tsk(i) Input Skew 175 ps
tsk(pp) Part-to-Part Skew; NOTE 2, 3 600 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 100 500 ps
odc Output Duty Cycle; NOTE 4
f 200MHz 46 54 %
f = 250MHz 40 60 %
MUX
ISOLATION
MUX Isolation 155.52MHz 43 dB
