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AP7173-SPG-13

P1-P3P4-P6P7-P9P10-P12P13-P15
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2
1 of 15
www.diodes.com
April 2011
© Diodes Incorporated
Description
The AP7173 is a 1.5A low-dropout (LDO) linear regulator that
features a user-programmable soft-start, an enable input and
a power-good output.
The soft-start reduces inrush current of the load capacitors
and minimizes stress on the input power source during start-
up. The enable input and power-good output allow users to
configure power management solutions that can meet the
sequencing requirements of FPGAs, DSPs, and other
applications with different start-up and power-down
requirements.
The AP7173 is stable with any type of output capacitor of
2.2µF or more. A precision reference and feedback control
deliver 2% accuracy over load, line, and operating
temperature ranges. The AP7173 is available in both
DFN3030-10 and SO-8EP packages.
Pin Assignments
Features
● Low V
IN
and wide V
IN
range: 1.0V to 5.5V
● Bias voltage (V
VCC
) range: 2.7V to 5.5V
● Low V
OUT
range: 0.8V to 3.3V
● Low dropout: 165mV typical at 1.5A, V
VCC
= 5V
● 2% accuracy over line, load and temperature range
● Power-Good (PG) output for supply monitoring and for
sequencing of other supplies
● Programmable soft-start provides linear voltage startup
● Bias supply permits low V
IN
operation with good transient
response
● Stable with any output capacitor ≥ 2.2µF
● DFN3030-10 and SO-8EP: available in “Green” molding
compound (No Br, Sb)
● Lead-free finish/ RoHS Compliant (Note 1)
Applications
• PCs, Servers, Modems, and Set-Top-Boxes
• FPGA Applications
• DSP Core and I/O Voltages
• Post-Regulation Applications
• Applications With Sequencing Requirements
Note: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
http://www.diodes.com/products/lead_free.html.
Typical Application Circuit
EN
PG
VCC
IN
OUT
FB
SS
GND
AP7173
R1
R2
R3
C1
C2
C3
V
OUT
V
IN
V
VCC
C
SS
Figure 1. Typical Application Circuit (Adjustable Output)
( Top View )
FB
EN
IN
GND
OUT
PG
VCC
IN
SS
OUT
DFN3030-10
1
2
3
4
5
9
10
8
7
6
SO-8EP
SSVCC
EN
IN
FB
GND
OUT
(Top View)
PG
1
2
3
4
5
6
7
8
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2
2 of 15
www.diodes.com
April 2011
© Diodes Incorporated
Typical Application Circuit (Continued)
Table 1. Resistor Values for Programming the Output Voltage (Note 2)
R
1
(kΩ) R
2
(kΩ) V
OUT
(V)
Short Open 0.8
0.619 4.99 0.9
1.13 4.53 1
1.37 4.42 1.05
1.87 4.99 1.1
2.49 4.99 1.2
4.12 4.75 1.5
3.57 2.87 1.8
3.57 1.69 2.5
3.57 1.15 3.3
Note: 2 VOUT = 0.8 x (1 + R1 / R2)
Table 2. Capacitor Values for Programming the Soft-Start Time (Note 3)
CSS SOFT-START TIME
Open 0.1ms
270pF 0.5ms
560pF 1ms
2.7nF 5ms
5.6nF 10ms
0.01μF 18ms
Note: 3. tSS(s) = 0.8 x CSS(F) / (4.4 x 10
–7
)
Figure 2. Turn-On Response
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2
3 of 15
www.diodes.com
April 2011
© Diodes Incorporated
Pin Descriptions
Pin Name
PIN #
Description
SO-8EP DFN3030-10
IN 1 1, 2 Power Input pin.
PG 2 3
Power-Good pin, open-drain output. When the V
OUT
is below the
PG threshold the PG pin is driven low; when the V
OUT
exceeds the
threshold, the PG pin goes into a high-impedance state. To use the PG
pin, use a 10kΩ to 1MΩ pull-up resistor to pull it up to a supply of up to
5.5V, which can be higher than the input voltage.
VCC 3 4
Bias Input pin, provides input voltage for internal control circuitry. This
voltage should be higher than the V
IN
.
EN 4 5
Enable pin. This pin should be driven either high or low and must not
be floating. Driving this pin high enables the regulator, while pulling it
low puts the regulator into shutdown mode.
GND 5 6 Ground.
SS 6 7
Soft-Start pin. Connect a capacitor between this pin and the ground to
set the soft-start ramp time of the output voltage. If no capacitor is
connected, the soft-start time is typically 100µS.
FB 7 8
Feedback pin. Connect this pin to an external voltage divider to set the
output voltage.
OUT 8 9, 10 Regulated Output pin.
Thermal Pad — —
Solder this pad to large ground plane for increased thermal
performance.
Functional Block Diagram
Gate
Driver
Current Limit and
Thermal Shutdown
0.8V
0.72V
OUT
SS
FB
GND
IN
VCC
PG
EN
+
-
+
-
P1-P3P4-P6P7-P9P10-P12P13-P15

AP7173-SPG-13

Mfr. #:
Buy AP7173-SPG-13
Manufacturer:
Diodes Incorporated
Description:
LDO Voltage Regulators 1.5V LDO
Lifecycle:
New from this manufacturer.
Delivery:
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