Philips Semiconductors Preliminary data
XA-G49
XA 16-bit microcontroller family
64K Flash/2K RAM, watchdog, 2 UARTs
2001 Jun 27
38
V
DD
–0.5
0.45V
0.7V
DD
0.2V
DD
–0.1
t
CHCL
t
C
t
CLCH
t
CLCX
t
CHCX
SU00842
Figure 26. External Clock Drive
V
DD
–0.5
0.45V
0.2V
DD
+0.9
0.2V
DD
–0.1
NOTE:
AC inputs during testing are driven at V
DD
–0.5 for a logic ‘1’ and 0.45V for a logic ‘0’.
Timing measurements are made at the 50% point of transitions.
SU00703A
Figure 27. AC Testing Input/Output
V
LOAD
V
LOAD
+0.1V
V
LOAD
–0.1V
V
OH
–0.1V
V
OL
+0.1V
NOTE:
TIMING
REFERENCE
POINTS
For timing purposes, a port is no longer floating when a 100mV change from load voltage occurs,
and begins to float when a 100mV change from the loaded V
OH
/V
OL
level occurs. I
OH
/I
OL
≥ ±20mA.
SU00011
Figure 28. Float Waveform
V
DD
EA
RST
XTAL1
XTAL2
V
SS
V
DD
(NC)
CLOCK SIGNAL
SU00591B
Figure 29. I
DD
Test Condition, Active Mode
All other pins are disconnected
V
DD
EA
RST
XTAL1
XTAL2
V
SS
V
DD
(NC)
CLOCK SIGNAL
SU00590B
V
DD
Figure 30. I
DD
Test Condition, Idle Mode
All other pins are disconnected
