CY22381SXI-181T

CY22381
CY223811
Document #: 38-07012 Rev. *F Page 4 of 9
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Supply Voltage................................................–0.5V to +7.0V
DC Input Voltage ..............................–0.5V to + (V
DD
+ 0.5V)
Storage Temperature.................................. –65°C to +125°C
Junction Temperature.................................................. 125°C
Data Retention at Tj = 125°C ................................> 10 years
Maximum Programming Cycles........................................100
Package Power Dissipation......................................250 mW
Static Discharge Voltage
(per MIL-STD-883, Method 3015) ........................... 2000V
Latch up (per JEDEC 17) ....................................
±200 mA
Operating Conditions
Parameter Description Min Typ Max Unit
V
DD
Supply Voltage 3.135 3.3 3.465 V
T
A
Commercial Operating Temperature, Ambient 0 +70 °C
Industrial Operating Temperature, Ambient –40 +85 °C
C
LOAD_OUT
Max. Load Capacitance 15 pF
f
REF
External Reference Crystal 8 30 MHz
External Reference Clock
[2]
, Commercial
1–166MHz
External Reference Clock
[2]
, Industrial
1–150MHz
t
PU
Power up time for all VDD's to reach minimum specified voltage (power
ramps must be monotonic)
0.05 500 ms
Electrical Characteristics
Parameter Description Conditions
[1]
Min Typ Max Unit
I
OH
Output High Current
[3]
V
OH
= V
DD
– 0.5, V
DD
= 3.3 V 12 24 mA
I
OL
Output Low Current
[3]
V
OL
= 0.5V, V
DD
= 3.3 V 12 24 mA
C
XTAL_MIN
Crystal Load Capacitance
[3]
Capload at minimum setting 6 pF
C
XTAL_MAX
Crystal Load Capacitance
[3]
Capload at maximum setting 30 pF
C
IN
Input Pin Capacitance
[3]
Except crystal pins 7 pF
V
IH
HIGH-level Input Voltage CMOS levels,% of V
DD
70% V
DD
V
IL
LOW-level Input Voltage CMOS levels,% of V
DD
––30%V
DD
I
IH
Input HIGH Current V
IN
= V
DD
– 0.3 V <1 10 μA
I
IL
Input LOW Current V
IN
= +0.3 V <1 10 μA
I
OZ
Output Leakage Current Three-state outputs 10 μA
I
DD
Total Power Supply Current 3.3 V Power Supply; 3 outputs at 50 MHz 35 mA
3.3 V Power Supply; 3 outputs at 166 MHz 70 mA
I
DDS
Total Power Supply Current in
Shutdown Mode
Shutdown active 5 20 μA
Notes
1. Unless otherwise noted, Electrical and Switching Characteristics are guaranteed across these operating conditions.
2. External input reference clock must have a duty cycle between 40% and 60%, measured at V
DD
/2.
3. Guaranteed by design, not 100% tested.
[+] Feedback
CY22381
CY223811
Document #: 38-07012 Rev. *F Page 5 of 9
Switching Characteristics
Parameter Name Description Min Typ. Max Unit
1/t
1
Output Frequency
[3, 4]
Clock output limit, Commercial 200 MHz
Clock output limit, Industrial 166 MHz
t
2
Output Duty Cycle
[3, 5]
Duty cycle for outputs, defined as t
2
÷ t
1
,
Fout < 100 MHz, divider >= 2, measured
at V
DD
/2
45% 50% 55%
Duty cycle for outputs, defined as t
2
÷ t
1
,
Fout > 100 MHz or divider = 1, measured
at V
DD
/2
40% 50% 60%
t
3
Rising Edge Slew Rate
[3]
Output clock rise time, 20% to 80% of V
DD
0.75 1.4 V/ns
t
4
Falling Edge Slew Rate
[3]
Output clock fall time, 20% to 80% of V
DD
0.75 1.4 V/ns
t
5
Output Three-state Timing
[3]
Time for output to enter or leave
three-state mode after SHUTDOWN
/OE
switches
150 300 ns
t
6
Clock Jitter
[3, 6]
Peak-to-peak period jitter, CLK outputs
measured at V
DD
/2
–200 ps
t
7
Lock Time
[3]
PLL Lock Time from Power up 1.0 3 ms
Switching Waveforms
Notes
4. Guaranteed to meet 20% – 80% output thresholds and duty cycle specifications.
5. Reference Output duty cycle depends on XTALIN duty cycle.
6. Jitter varies significantly with configuration. Reference Output jitter depends on XTALIN jitter and edge rate.
t
1
OUTPUT
t
2
t
3
t
4
Figure 2. All Outputs, Duty Cycle and Rise and Fall Time
t
5
OE
ALL
OUTPUTS
t
5
THREE-STATE
Figure 3. Output Three-State Timing
CLK
OUTPUT
t
6
Figure 4. CLK Output Jitter
[+] Feedback
CY22381
CY223811
Document #: 38-07012 Rev. *F Page 6 of 9
Test Circuit
Switching Waveforms (continued)
SELECT
OLD SELECT NEW SELECT STABLE
F
old
F
new
t
7
OUTPUT
Figure 5. Frequency Change
0.1 mF
V
DD
CLKout
C
LOAD
GND
OUTPUTS
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CY22381SXI-181T

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
IC CLOCK GENERATOR
Lifecycle:
New from this manufacturer.
Delivery:
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