MC74LCX16240
http://onsemi.com
4
DC ELECTRICAL CHARACTERISTICS
T
A
= −40°C to +85°C
Symbol Characteristic Condition Min Max Unit
V
IH
HIGH Level Input Voltage (Note 2)
2.3 V ≤ V
CC
≤ 2.7 V 1.7
V
2.7 V ≤ V
CC
≤ 3.6 V 2.0
V
IL
LOW Level Input Voltage (Note 2)
2.3 V ≤ V
CC
≤ 2.7 V 0.7
V
2.7 V ≤ V
CC
≤ 3.6 V 0.8
V
OH
HIGH Level Output Voltage
2.3 V ≤ V
CC
≤ 3.6 V; I
OL
= 100 mA
V
CC
− 0.2
V
V
CC
= 2.3 V; I
OH
= −8 mA 1.8
V
CC
= 2.7 V; I
OH
= −12 mA 2.2
V
CC
= 3.0 V; I
OH
= −18 mA 2.4
V
CC
= 3.0 V; I
OH
= −24 mA 2.2
V
OL
LOW Level Output Voltage
2.3 V ≤ V
CC
≤ 3.6 V; I
OL
= 100 mA
0.2
V
V
CC
= 2.3 V; I
OL
= 8 mA 0.6
V
CC
= 2.7 V; I
OL
= 12 mA 0.4
V
CC
= 3.0 V; I
OL
= 16 mA 0.4
V
CC
= 3.0 V; I
OL
= 24 mA 0.55
I
OZ
3−State Output Current V
CC
= 3.6 V, V
IN
= V
IH
or V
IL
,
V
OUT
= 0 to 5.5 V
±5
mA
I
OFF
Power Off Leakage Current V
CC
= 0, V
IN
= 5.5 V or V
OUT
= 5.5 V 10
mA
I
IN
Input Leakage Current V
CC
= 3.6 V, V
IN
= 5.5 V or GND ±5
mA
I
CC
Quiescent Supply Current V
CC
= 3.6 V, V
IN
= 5.5 V or GND 10
mA
DI
CC
Increase in I
CC
per Input 2.3 ≤ V
CC
≤ 3.6 V; V
IH
= V
CC
− 0.6 V 500
mA
2. These values of V
I
are used to test DC electrical characteristics only.
AC CHARACTERISTICS t
R
= t
F
= 2.5ns; R
L
= 500 W
Symbol Parameter Waveform
T
A
= −40°C to +85°C
Unit
V
CC
= 3.3 V ± 0.3 V
C
L
= 50 pF
V
CC
= 2.7 V
C
L
= 50 pF
V
CC
= 2.5 V ± 0.2 V
C
L
= 30 pF
Min Max Min Max Min Max
t
PLH
t
PHL
Propagation Delay
Input to Output
1 1.5
1.5
4.5
4.5
1.5
1.5
5.3
5.3
1.5
1.5
5.4
5.4
ns
t
PZH
t
PZL
Output Enable Time to
High and Low Level
2 1.5
1.5
5.4
5.4
1.5
1.5
6.0
6.0
1.5
1.5
7.0
7.0
ns
t
PHZ
t
PLZ
Output Disable Time From
High and Low Level
2 1.5
1.5
5.3
5.3
1.5
1.5
5.4
5.4
1.5
1.5
6.4
6.4
ns
t
OSHL
t
OSLH
Output−to−Output Skew
(Note 3)
1.0
1.0
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
OSHL
) or LOW−to−HIGH (t
OSLH
); parameter
guaranteed by design.
