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PI6C2972FCE

P1-P3P4-P6P7-P7
4
PS8590C 09/22/04
PI6C2972
Low Voltage PLL Clock Driver
1:1 Mode
2:1 Mode
3:1 Mode
3:2 Mode
4:1 Mode
4:3 Mode
1:6 Mode
fVCO
Qa
Qc
Sync
Qa
Qc
Sync
Qc(2)
Qa(6)
Sync
Qa(4)
Qc(6)
Sync
Qc(2)
Qa(8)
Sync
Qa(6)
Qc(8)
Sync
Qa(12)
Qc(2)
Sync
Timing Diagrams
5
PS8590C 09/22/04
PI6C2972
Low Voltage PLL Clock Driver
lobmySsnoitidnoCcitsiretcarahC.niM.pyT.xaMstinU
V
HI
egatloVHGIHtupnI0.26.3
V
V
LI
egatloVWOLtupnI8.0
V
HO
I
HO
Am02=
)2(
egatloVHGIHtuptuO4.2
V
LO
I
LO
Am02=
)2(
egatloVWOLtuptuO5.0
I
NI
3etoNtnerruCtupnI021±
Αµ
I
CC
tnerruCylppuStnecseiuQmumixaM091512
Am
I
ACC
VgolanA
CC
tnerruC5102
C
NI
ecnaticapaCtupnI4
Fp
C
dp
tuptuOrePecnaticapaCnoitapissiDrewoP52
Notes:
1. V
CMR
is the difference from the most positive side of the differential input signal. Normal operation is obtained when
the “High” input is within the V
CMR
range and the input lies within the V
PP
specification.
2. The PI6C2972 outputs can drive series or parallel terminated 50 Ohm (or 50 Ohm to V
CC
/2) transmission lines on the
incident edge.
3. Inputs have pull–up/pull–down resistors which affect input current.
4. Special thermal handling may be required in some configurations.
lobmySretemaraP.niM.xaMstinU
V
CC
egatloVylppuS3.0–6.4V
V
I
egatloVtupnI3.0–V
DD
3.0+V
I
NI
tnerruCtupnI02±Am
T
ROTS
erutarepmeTegarotS04–521C°
*Absolute maximum continuous ratings are those values beyond which damage to the device may occur.
Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability.
Functional operation under absolute-maximum-rated conditions is not implied.
DC Characteristics (T
A
= 0°C to 70°C, V
CC
= 3.3V ± 5%)
(4)
Absolute Maximum Ratings
6
PS8590C 09/22/04
PI6C2972
Low Voltage PLL Clock Driver
Notes:
7. 50 Ohm transmission line terminated into V
CC
/2
8. tpd is specified for a 50 MHz input reference. The window will shrink/grow proportionally from the minimum limit with shorter/
longer input reference periods. The tpd does not include jitter.
lobmySsnoitidnoCscitsiretcarahC.niM.xaMstinU
ft,rtsllaF/esiRtupnIKLCT0.3sn
ferf5etoNycneuqerFtupnIecnerefeR5etoN5etoN,001zHM
CDferfelcyCytuDtupnIecnerefeR5257%
latxtycneuqerFrotallicsOlatsyrC0152zHM
PLL Input Reference Characteristic (T
A
= 0°C to 70°C)
Notes:
5. Maximum input reference frequency is limited by the VCO lock range and the feedback divider or 100 MHz,
minimum input reference frequency is limited by the VCO lock range and the feedback divider.
lobmySscitsiretcarahCsnoitidnoC.niM.pyT.xaMstinU
t,rt
f
)7etoN(emiTllaF/esiRtuptuOV0.2ot8.051.02.1sn
t
wp
)7etoN(elcyCytuDtuptuO
t
ELCYC
2/
057–
t
ELCYC
2/
005±
t
ELCYC
2/
057+
sp
t
dp
yaleDnoitagaporP
=BFQ,8,7setoN ÷8
0KLCT
1KLCT
072–
033–
031
07
035
074
t
so
wekStuptuO-ot-tuptuO7etoN055
f
OCV
egnaRkcoLOCV
7etoN
002084
zHM
f
xam
)2÷(QycneuqerFtuptuOmumixaM
)4÷(Q
)6÷(Q
)8÷(Q
521
021
08
06
rettijt)kaeP–ot–kaeP(rettiJelcyC–ot–elcyC 001±sp
t
ZLP
t,
ZHP
emiTelbasiDtuptuO28
sn
t
LZP
t,
HZP
emITelbaNEtuptuO201
t
kcol
emiTkcoLLLPmumixaM 01sm
f
XAM
ycneuqerFklC_zrFmumixaM 02zHM
AC Characteristics (T
A
= 0°C to 70°C, V
CC
= 3.3V ± 5%)
P1-P3P4-P6P7-P7

PI6C2972FCE

Mfr. #:
Buy PI6C2972FCE
Manufacturer:
Diodes Incorporated
Description:
Phase Locked Loops - PLL Zero Delay Buffer with Divider
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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