LTC4097
16
4097f
APPLICATIONS INFORMATION
The LTC4097 can be used above 64°C ambient, but the
charge current will be reduced from 500mA. The ap-
proximate current at a given ambient temperature can be
approximated by:
I
CT
VV
BAT
A
IN BAT JA
=
°115
(–
)
θ
Using the previous example with an ambient temperature
of 75°C, the charge current will be reduced to approxi-
mately:
I
CC
VV CW
C
CA
BAT
=
°°
°
=
°
°
115 75
53360
40
102
(–.) / /
IImA
BAT
= 392
It is important to remember that LTC4097 applications do
not need to be designed for worst-case thermal conditions,
since the IC will automatically reduce power dissipation
when the junction temperature reaches approximately
115°C. Moreover a thermal shut down protection circuit
around 150°C safely prevents any damage by forcing the
LTC4097 into shut down mode.
Thermal Considerations
In order to deliver maximum charge current under all
conditions, it is critical that the exposed metal pad on the
backside of the LTC4097 package is properly soldered
to the PC board ground. When correctly soldered to a
2500mm
2
double sided 1oz copper board, the LTC4097
has a thermal resistance of approximately 60°C/W. Failure
to make thermal contact between the exposed pad on the
backside of the package and the copper board will result in
thermal resistances far greater than 60°C/W. As an example,
a correctly soldered LTC4097 can deliver over 500mA to
a battery from a 5V supply at room temperature. Without
a good backside thermal connection, this number would
drop to much less than 300mA.
Alternate NTC Thermistors and Biasing
The LTC4097 provides temperature qualifi ed charging if
a grounded thermistor and a bias resistor are connected
to NTC. By using a bias resistor whose value is equal to
the room temperature resistance of the thermistor (R25)
the upper and lower temperatures are pre-programmed
to approximately 40°C and 0°C, respectively (assuming
a Vishay “Curve 1” thermistor).
The upper and lower temperature thresholds can be ad-
justed by either a modifi cation of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modifi ed but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustment resistor, both the upper and the lower tempera-
ture trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
NTC thermistors have temperature characteristics which
are indicated on resistance-temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
in the following examples, has a nominal value of 100k
and follows the Vishay “Curve 1” resistance-temperature
characteristic.
In the explanation below, the following notation is used.
R25 = Value of the Thermistor at 25°C
R
NTC|COLD
= Value of thermistor at the cold trip point
R
NTC|HOT
= Value of the thermistor at the hot trip
point
r
COLD
= Ratio of R
NTC|COLD
to R25
r
HOT
= Ratio of R
NTC|HOT
to R25
R
NOM
= Primary thermistor bias resistor (see Fig-
ure 4)
R1 = Optional temperature range adjustment resistor
(see Figure 5)
The trip points for the LTC4097’s temperature qualifi cation
are internally programmed at 0.349 • VNTC for the hot
threshold and 0.765 • VNTC for the cold threshold.
Therefore, the hot trip point is set when:
R
RR
VNTC VNTC
NTC HOT
NOM NTC HOT
|
|
•.
+
= 0 349
LTC4097
17
4097f
APPLICATIONS INFORMATION
+
+
R
NOM
100k
R
NTC
100k
NTC
VNTC
3
0.1V
NTC_ENABLE
4097 F04
NTC BLOCK
TOO_COLD
TOO_HOT
0.765 • VNTC
0.349 • VNTC
+
6
+
+
R
NOM
105k
R
NTC
100k
R1
12.7k
NTC
VNTC
3
0.1V
NTC_ENABLE
4097 F05
TOO_COLD
TOO_HOT
0.765 • VNTC
0.349 • VNTC
+
6
NTC BLOCK
Figure 4. Typical NTC Thermistor Circuit
and the cold trip point is set when:
R
RR
VNTC VNTC
NTC COLD
NOM NTC COLD
|
|
•.
+
= 0 765
Solving these equations for R
NTC|COLD
and R
NTC|HOT
results
in the following:
R
NTC|COLD
= 0.536 • R
NOM
and
R
NTC|COLD
= 3.25 • R
NOM
By setting R
NOM
equal to R25, the above equations result
in r
HOT
= 0.536 and r
COLD
= 3.25. Referencing these ratios
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
By using a bias resistor, R
NOM
, different in value from R25,
the hot and cold trip points can be moved in either direc-
tion. The temperature span will change somewhat due to
the non-linear behavior of the thermistor. The following
equations can be used to easily calculate a new value for
the bias resistor:
R
r
R
R
r
R
NOM
HOT
NOM
COLD
=
=
0 536
25
325
25
.
.
where r
HOT
and r
COLD
are the resistance ratios at the
desired hot and cold trip points. Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
From the Vishay Curve 1 R-T characteristics, r
HOT
is 0.2488
at 60°C. Using the above equation, R
NOM
should be set
to 46.4k. With this value of R
NOM
, the cold trip point is
about 16°C. Notice that the span is now 44°C rather than
the previous 40°C. This is due to the decrease in “tem-
perature gain” of the thermistor as absolute temperature
increases.
The upper and lower temperature trip points can be inde-
pendently programmed by using an additional bias resistor
as shown in Figure 5. The following formulas can be used
to compute the values of R
NOM
and R1:
R
rr
R
RRr
NOM
COLD HOT
NOM HOT
=
=
.
.•
2 714
25
1 0 536 RR25
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose
Rkk
NOM
==
3 266 0 4368
2 714
100 104 2
.–.
.
•.
Figure 5. NTC Thermistor Circuit with Additional Bias Resistor
LTC4097
18
4097f
APPLICATIONS INFORMATION
the nearest 1% value is 105k.
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
the nearest 1% value is 12.7k. The fi nal solution is shown
in Figure 5 and results in an upper trip point of 45°C and
a lower trip point of 0°C.
Protecting the USB Pin and Wall Adapter Input from
Overvoltage Transients
Caution must be exercised when using ceramic capaci-
tors to bypass the USBIN or the wall adapter inputs. High
voltage transients can be generated when the USB or wall
adapter is hot plugged. When power is supplied via the
USB bus or wall adapter, the cable inductance along with
the self resonant and high Q characteristics of ceramic
capacitors can cause substantial ringing which could
exceed the maximum voltage ratings and damage the
LTC4097. Refer to Linear Technology Application Note 88,
entitled “Ceramic Input Capacitors Can Cause Overvoltage
Transients” for a detailed discussion of this problem.
Always use an oscilloscope to check the voltage wave-
forms at the USBIN and DCIN pins during USB and wall
adapter hot-plug events to ensure that overvoltage
transients have been adequately removed.
Reverse Polarity Input Voltage Protection
In some applications, protection from reverse polarity
voltage on the input supply pins is desired. If the sup-
ply voltage is high enough, a series blocking diode can
be used. In other cases where the voltage drop must be
kept low, a P-channel MOSFET can be used (as shown in
Figure 6).
WALL
ADAPTER
DCIN
LTC4097
DRAIN-BULK
DIODE OF FET
4097 F06
Figure 6. Low Loss Input Reverse Polarity Protection

LTC4097EDDB#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Dual Input Standalone Li-Ion Battery Charger w/ NTC
Lifecycle:
New from this manufacturer.
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