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TSH103ID

P1-P3P4-P6P7-P9P10-P12
Electrical characteristics TSH103
4/12 Doc ID 13895 Rev 2
Figure 1. Frequency response Figure 2. Gain flatness
100k 1M 10M 100M
-60
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
27MHz
Vcc = +4.5V, +5V, +5.5V
Small signal
Load = 150
Ω
Gain (dB)
Frequency (Hz)
100k 1M 10M
5.0
5.2
5.4
5.6
5.8
6.0
6.2
6.4
6.6
6.8
7.0
Vcc = +4.5V, +5V, +5.5V
Small signal
Load = 150
Ω
Gain (dB)
Frequency (Hz)
Figure 3. Frequency response (large signal) Figure 4. Distortion
100k 1M 10M 100M
-60
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
Vcc = +4.5V, +5V, +5.5V
Vout = 2Vp-p
Load = 150
Ω
Gain (dB)
Frequency (Hz)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
-90
-85
-80
-75
-70
-65
-60
-55
-50
-45
-40
H3
H2
Vcc = +5V
Vicm = +0.5V
F = 1MHz
Load = 150
Ω
Distortion (dB)
Output Amplitude (Vp-p)
Figure 5. Quiescent current vs. supply Figure 6. Input noise vs. frequency
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
no input signal
no load
Icc (mA)
Vcc (V)
1k 10k 100k 1M
40
60
80
100
120
140
160
180
200
220
240
260
No load
Input to GND
Vcc=+5V
e
n
(nV/VHz)
Frequency (Hz)
TSH103 Power supply considerations
Doc ID 13895 Rev 2 5/12
4 Power supply considerations
Correct power supply bypassing is very important for optimizing performance in high-
frequency ranges. The bypass capacitors should be placed as close as possible to the IC
pins to improve high-frequency bypassing. A capacitor of 100 µF is necessary to minimize
the power supply noise in low frequencies. For better quality bypassing, we recommend
adding a CMS 100 nF capacitor, also placed as close as possible to the IC pins.
Figure 7. Circuit for power supply bypassing
Figure 8. Noise supply rejection
+V
CC
CLF = 100 µF
+
CHF = 100 nF
5
TSH103
IN1
IN2
IN3
OUT1
OUT2
OUT3
4
AM04552
100k 1M 10M
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
Vcc=+5Vdc+0.2Vac
Load=150
Ω
C
LF
=100uF
C
HF
=100nF
Noise supply rejection (dB)
Frequency (Hz)
Using the TSH103 to drive video signals TSH103
6/12 Doc ID 13895 Rev 2
5 Using the TSH103 to drive video signals
Figure 9. Video line interface implementation schematics
The bottom of the synchronization tip at the DAC output can be as low as 0 mV. In this case,
the bottom is equal to 310 mV typical at the TSH103 output (see values of the output DC
shift in Ta ble 3). The Y signal can be properly driven by the TSH103 because its low output
rail (V
OL
) is lower than 46 mV (Tabl e 3).
Figure 10. Details on Y or G or C
VBS for synchronization tip
+5 V
75 Ω cable
75 Ω
Video
DAC
Y
75 Ω
Video
DAC
Pb
75 Ω
Video
DAC
Pr
TV
75 Ω
DAC
load
resistor
DAC
load
resistor
DAC
load
resistor
0.7 Vpp
0.3 V
GND
1 V
1 Vpp
0.3 V
GND
1 V
0.7 Vpp
0.3 V
GND
1 V
0.7 Vpp
1.4 Vpp
2 Vpp
0.9 V
GND
2.3 V
0.9 V
GND
2.3 V
GND
1.15 V
0.45 V
0.7 Vpp
1.4 Vpp
GND
GND
TSH103
1 Vpp
0.45 V
GND
1.15 V
0.9 V
2.3 V
1.15 V
0.45 V
75 Ω cable
75 Ω cable
75 Ω
75 Ω
AM04553
DAC
Y signal
Time
Amplitude
Synchronization tip
(close to zero volt)
Black
(300 mV)
White
(1 V)
GND
AM04554
P1-P3P4-P6P7-P9P10-P12

TSH103ID

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Manufacturer:
STMicroelectronics
Description:
Video Amplifiers LOW COST TRIPLE VID BUFFER/FILTER
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