PL602-03SC Datasheet PL602-03SC, PL602-03SC-R, PL602-03OC | P1-P3

PL602-03

Low Phase Noise CMOS XO (48MHz to 100MHz)

Micrel Inc. • 2 180 Fortune Drive • San J ose, CA 9513 1 • USA • tel +1 (408) 944 -0800 • fax +1(408) 47 4-1000 • www.micrel.com Rev 11/16/11 Page 1

FEATURES

 Low phase noise XO output for the 48MHz to

100MHz range (-130 dBc at 10kHz offset).

 12 to 25MHz crystal input.

 Integrated crystal load capacitor: no external

load capacitor required.

 Selectable High Drive (30mA) or Sta ndard Drive

(10mA) output.

 3.3V operation.

 Available in 8-Pin TSSOP or SOIC.

DESCRIPTION

The PL602-03 is a low cost, high performance and

low phase noise XO, providing less than -130dBc at

10kHz offset in the 48MHz to 100MHz operating

range. The very low jitter makes this chip ideal for

applications requiring clean reference frequency

sources. Input crystal can range from 12 to 25MHz

(fundamental resonant mode).

PIN CONFIGURATION

OUTPUT RANGE

MULTIPLIER

FREQUENCY

RANGE

OUTPUT

BUFFER

X4

48 - 100MHz

CMOS

BLOCK DIAGRAM

Reference

Divider

Phase

Comparator

Charge

Pump

Loop

Filter

VCO

Divider

XTAL

OSC

OE

XIN

XOUT

CLK

PL602-03

1

2

3

4 5

6

7

8

CLK

VDD

OE^

XIN

GND

N/C

XOUT

GND

Note: ^ denotes internal pull up

PL602-03

Low Phase Noise CMOS XO (48MHz to 100MHz)

Micrel Inc. • 2180 Fort une Drive • San Jose, CA 95131 • USA • t el +1(408) 944-0800 • fax +1(408) 474- 1000 • www.micrel.com Rev 11/16/11 Pa ge 2

PIN DESCRIPTIONS

Name

Number

Type

Description

CLK

1

O

Output clock.

VDD

2

P

power supply.

OE

3

I

Output enable input. Disables (tri-state) output when low. Internal pull-up

enables output by default if pin is not connected to low.

XIN

4

I

Crystal input. See Crystal Specification on page 3.

XOUT

5

I

Crystal output. See Crystal Specification on page 3.

N/C

6

-

Not connected.

GND

7, 8

P

Ground.

ELECTRICAL SPECIFICATIONS

1. Absolute Maximum Ratings

PARAMETERS

SYMBOL

MIN.

MAX.

UNITS

Supply Voltage

V

DD

4.6

V

Input Voltage, dc

V

I

-0.5

V

DD

+0.5

V

Output Voltage, dc

V

O

-0.5

V

DD

+0.5

V

Storage Temperature

T

S

-65

150

C

Ambient Operating Temperature*

T

A

-40

85

C

Lead Temperature (soldering, 10s)

260

C

ESD Protection, Human Body Model

2

kV

Exposure of the device under conditions beyond the limits specifie d by Maximum Rat ings for e xtended pe riods may c ause permanent dam age to the

device and af fect product reliability. These co nditions represent a stress r ating only, and functional operations of the dev ice at these or any other co n-

ditions above t he operational limits noted in this specification is not i mplied.

* Not e: O perating Tempe rature is guaranteed by design for all parts (COMMERCIAL and INDU STRIAL), but tested for COMMERCIAL grade only.

2. DC Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Supply Current, Dynamic, with

Loaded Outputs

I

DD

F

XIN

= 12 - 25MHz

Output load of 10pF

35

mA

Operating Voltage

V

DD

2.97

3.63

V

Output drive current

(High Drive)

I

OH

V

OH

= V

DD

-0.4V, V

DD

=3.3V

30

mA

I

OL

V

OL

= 0.4V, V

DD

= 3.3V

30

mA

Output drive current

(Standard Drive)

I

OH

V

OH

= V

DD

-0.4V, V

DD

=3.3V

10

mA

I

OL

V

OL

= 0.4V, V

DD

= 3.3V

10

mA

PL602-03

Low Phase Noise CMOS XO (48MHz to 100MHz)

Micrel Inc. • 2180 Fort une Drive • San Jose, CA 95131 • USA • t el +1(408) 944-0800 • fax +1(408) 474- 1000 • www.micrel.com Rev 11/16/11 Pa ge 3

3. AC Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Input Crystal Frequency

12

25

MHz

Output Clock Rise/Fall Time

(Standard Drive)

0.3V ~ 3.0V with 15 pF load

2.4

ns

Output Clock Rise/Fall Time

(High Drive)

0.3V ~ 3.0V with 15 pF load

1.2

Output Clock Duty Cycle

Measured @ 50% V

DD

45

50

55

%

4. Jitter and Phase Noise Specification

PARAMETERS

CONDITIONS

MIN.

TYP.

MAX.

UNITS

RMS Period Jitter

(1 sigma – 1000 samples)

at 80MHz, with capacitive decoupling

between VDD and GND.

20

ps