4
Transmitter and Receiver Signaling Rate Range and
BER Performance
For purposes of denition, the symbol rate (Baud), also
called signaling rate, is the reciprocal of the symbol time.
Data rate (bits/sec) is the symbol rate divided by the
encoding factor used to encode the data (symbols/bit).
When used in 115 Mbps SONET OC-3 applications, the
performance of Avago Technologies’ 1300 nm data link
modules, HFBR- 1116TZ/-2116TZ, is guaranteed to the full
conditions listed in the individual product specication
tables.
The data link modules may be used for other applications
at signaling rates dierent than the 155 Mbps with some
variation in the link optical power budget. Figure 5 gives
an indication of the typical performance of these 1300 nm
products at dierent rates.
These data link modules can also be used for applications
which require dierent bit-error-ratio (BER) performance.
Figure 6 illustrates the typical trade-o between link BER
and the receiver input optical power level.
Data Link Jitter Performance
The Avago 1300 nm data link modules are designed to
operate per the system jitter allocations stated in Table B1
of Annex B of the ANSI T1E1.2 Revision 3 standard.
The 1300 nm transmitter will tolerate the worst-case input
electrical jitter allowed in Annex B without violating the
worst-case output jitter requirements.
The 1300 nm receiver will tolerate the worst-case input
optical jitter allowed in Annex B without violating the
worst-case output electrical jitter allowed.
The jitter specications stated in the following transmitter
and receiver specication table are derived from the
values in Table B1 of Annex B. They represent the worst-
case jitter contribution that the transmitter and receiver
are allowed to make to the overall system jitter without
violating the Annex B allocation example. In practice, the
typical jitter contribution of the Avago Technologies’ data
link modules is well below the maximum amounts.
Recommended Handling Precautions
It is advised that normal static precautions be taken in
the handling and assembly of these data link modules to
prevent damage which may be induced by electrostatic
discharge (ESD). The HFBR-1116TZ/-2116TZ series meets
MIL-STD-883C Method 3015.4 Class 2.
Care should be taken to avoid shorting the receiver Data
or Signal Detect Outputs directly to ground without
proper currentlimiting impedance.
Solder and Wash Process Compatibility
The transmitter and receiver are delivered with protec-
tive process caps covering the individual ST* ports. These
process caps protect the optical subassemblies during
wave solder and aqueous wash processing and act as dust
covers during shipping.
These data link modules are compatible with either
industry standard wave- or hand-solder processes.
Figure 5. Transmitter/Receiver relative optical power budget at constant BER
vs. signaling rate.
Figure 6. Bit error ratio vs. relative receiver input optical power.
TRANSMITTER/RECEIVER RELATIVE OPTICAL
POWER BUDGET AT CONSTANT BER (dB)
0 200
0
SIGNAL RATE (MBd)
25 75 100 125
2.5
2.0
1.5
1.0
175
HFBR-1116T fig 5
0.5
50 150
CONDITIONS:
1. PRBS 2
7
-1
2. DATA SAMPLED AT CENTER OF DATA SYMBOL.
3. BER = 10
-6
4. T
A
= 25° C
5. V
CC
= 5 Vdc
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
0.5
-6 4
1 x 10
-2
RELATIVE INPUT OPTICAL POWER – dB
-4 2
-2 0
1 x 10
-4
1 x 10
-6
1 x 10
-8
1 x 10
-10
1 x 10
-11
CONDITIONS:
1. 155 MBd 
2. PRBS 2
7
-1
3. T
A
= 25° C
4. V
CC
= 5 Vdc
5. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
1 x 10
-12
1 x 10
-9
1 x 10
-7
1 x 10
-5
1 x 10
-3
CENTER OF SYMBOL
5
Shipping Container
The data link modules are packaged in a shipping
container designed to protect it from mechanical and ESD
damage during shipment or storage.
Board Layout – Interface Circuit and Layout Guidelines
It is important to take care in the layout of your circuit
board to achieve optimum performance from these data
link modules. Figure 7 provides a good example of a
power supply lter circuit that works well with these parts.
Also, suggested signal terminations for the Data, Data-bar,
Signal Detect and Signal Detect-bar lines are shown. Use
of a multilayer, ground-plane printed circuit board will
provide good high-frequency circuit performance with
a low inductance ground return path. See additional
recommendations noted in the interface schematic
shown in Figure 7.
Figure 7. Recommended interface circuitry and power supply lter circuits.
Notes:
1. Resistance is in ohms. Capacitance is in microfarads. Inductance is in microhenries.
2. Terminate transmitter input data and data-bar at the transmitter input pins. Terminate the receiver output data, data-bar, and signal detect-bar at
the follow-on device input pins. For lower power dissipation in the signal detect termination circuitry with small compromise to the signal quality,
each signal detect output can be loaded with 510 ohms to ground instead of the two resistor, split-load pecl termination shown in this schematic.
3. Make dierential signal paths short and of same length with equal termination impedance.
4. Signal traces should be 50 ohms microstrip or stripline transmission lines. Use multilayer, ground-plane printed circuit board for best high-
frequency performance.
5. Use high-frequency, monolithic ceramic bypass capacitors and low series DC resistance inductors. Recommend use of surface-mount coil
inductors and capacitors. In low noise power supply systems, ferrite bead inductors can be substituted for coil inductors. Locate power supply
lter components close to their respective power supply pins. C7 is an optional bypass capacitor for improved, low-frequency noise power supply
lter performance.
6. Device ground pins should be directly and individually connected to ground.
7. Caution: do not directly connect the ber-optic module PECL outputs (data, data-bar, signal detect, signal detect-bar, V
BB
) to ground without
proper current limiting impedance.
8. (*) Optional metal ST optical port transmitter and receiver modules will have pins 8 and 9 electrically connected to the metal port only and not
connected to the internal signal ground.
NC 8
9 NC
7
10 GND
GND 6
11 V
CC1
GND 5
12 V
CC
GND 4
13 GND
GND 3
14 D
V
BB
2
15 D
NC 1
16 NC
HFBR-1116T fig 7a
NO
PIN
Tx
A
C2
0.1
*
L2
1
R3
82
R4
130
R2
82
R1
130
C2
0.1
+5 Vdc
GND
DATA
DATA
TERMINATE D, D
AT Tx INPUTS
*
NC 8
9 NC
GND 7
10
V
CC
6
11 GND
V
CC
5
12 GND
V
CC
4
13 GND
D 3
14 SD
D
2
15 SD
NC 1
16
HFBR-1116T fig 7b
Rx
A
*
L1
1
R12
130
DATA
DATA
TERMINATE D, D, SD, SD
INPUTS OF FOLLOW-ON DEVICES
*
NO
PIN
NO
PIN
C1
0.1
C7
10
(OPTIONAL)
C3
0.1
C4
10
R6
130
R8
130
R5
82
R7
82
R9
82
C6
0.1
SD
R11
82
SD
R10
130
TOP VIEWS
6
Board Layout – Hole Pattern
The Avago transmitter and receiver hole pattern is com-
patible with other data link modules from other vendors.
The drawing shown in Figure 8 can be used as a guide in
the mechanical layout of your circuit board.
Regulatory Compliance
These data link modules are intended to enable com-
mercial system designers to develop equipment that
complies with the various international regulations
governing certication of Information Technology Equip-
ment. Additional information is available from your Avago
sales representative.
All HFBR-1116TZ LED transmitters are classied as
IEC-825-1 Accessible Emission Limit (AEL) Class 1 based
upon the current proposed draft scheduled to go into
eect on January 1, 1997. AEL Class 1 LED devices are con-
sidered eye safe. See Application Note 1094, LED Device
Classications with Respect to AEL Values as Dened in the
IEC 825-1 Standard and the European EN60825-1 Directive.
The material used for the housing in the HFBR-1116TZ/-
2116TZ series is Ultem 2100 (GE). Ultem 2100 is recog-
nized for a UL ammability rating of 94V-0 (UL File Number
E121562) and the CSA (Canadian Standards Association)
equivalent (File Number LS88480).
Figure 8. Recommended board layout hole pattern.
(7X)
2.54
.100
17.78
.700
7.62
.300
0.8 ± 0.1
.032 ± .004
(16X)
ø
Ø 0.000
MA
–A–
HFBR-1116T fig 8
TOP VIEW
Figure 9. HFBR-1116TZ transmitter output optical spectral width (FWHM) vs.
transmitter output optical center wavelength and rise/fall times.
200
100
λ
C
– TRANSMITTER OUTPUT OPTICAL
CENTER WAVELENGTH –nm
1280 1300 1320
180
160
140
120
1360
HFBR-1116T fig 9
1340
∆λ – TRANSMITTER OUTPUT OPTICAL
SPECTRAL WIDTH (FWHM) –nm
1.0
1.5
2.5
3.0
2.0
HFBR-1116T TRANSMITTER TEST RESULTS
OF λ
C
, ∆λ AND t
r/f
ARE CORRELATED AND
COMPLY WITH THE ALLOWED SPECTRAL WIDTH
AS A FUNCTION OF CENTER WAVELENGTH FOR
VARIOUS RISE AND FALL TIMES.
1260
t
r/f
– TRANSMITTER
OUTPUT OPTICAL
RISE/FALL TIMES – ns
3.0
Figure 10. HFBR-2116TZ receiver input optical power vs. eye sampling time
position.
RELATIVE INPUT OPTICAL POWER (dB)
0
EYE SAMPLING TIME POSITION (ns)
-3 -1 01
5
4
3
2
3
HFBR-1116T fig 10
1
-2 2
CONDITIONS:
1.T
A
= 25° C
2. V
CC
= 5 Vdc
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
4. INPUT OPTICAL POWER IS NORMALIZED TO
CENTER OF DATA SYMBOL.
5. NOTE 15 AND 16 APPLY.

HFBR-2116TZ

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
Fiber Optic Transmitters, Receivers, Transceivers 1300nm 155M 16pin DI P ST Rx Pbfree
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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