ISL59833IAZ-EVALZ

13
FN6334.1
March 5, 2007
THE VREF PIN
Applying a voltage to the VREF pin simply places that
voltage on what would usually be the ground side of the gain
resistor of the amplifier, resulting in a DC-level shift of the
output signal. Applying 100mV to the VREF pin would apply
a -100mV DC level shift to the outgoing signal. The charge
pump provides sufficient bottom room to accommodate the
shifted signal. VREF may be connected to ground for back
porch at ground.
The ISL59833 buffers the VREF voltage before applying it to
the triple amplifiers, isolating the input from the amplifiers
and allowing it to be driven by moderate-impedance voltage
sources.
THE VEE PIN
The VEE pin is the output pin for the charge pump. A
voltmeter applied to this pin will display the output of the
charge pump. This pin does not affect the functionality of the
part. One may use this pin as an additional voltage source.
Keep in mind that the output of this pin is generated by the
internal charge pump and a fully regulated supply that must
be properly bypassed. We recommend a 0.1µF ceramic
capacitor placed as close to the pin and connected to the
ground plane of the board.
INPUT, OUTPUT AND SUPPLY VOLTAGE RANGE
The ISL59833 is designed to operate with a single supply
voltage range of from 0V to 3.3V. The need for a split supply
has been eliminated with the incorporation of a charge pump
capable of generating a bottom rail as much as 1.6V below
ground, for a 4.9V range on a single 3.3V supply. This
performance is ideal for NTSC video with its negative-going
sync pulses.
VIDEO PERFORMANCE
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency and phase response as DC levels are changed at
the output. This is especially difficult when driving a standard
video load of 150Ω because of the change in output current
with changing DC levels. Special circuitry has been
incorporated into the ISL59833 for the reduction of output
impedance variation with the current output. This results in
outstanding differential gain and differential phase
specifications of 0.06% and 0.1°, while driving 150Ω at a
gain of +2. Driving higher impedance loads would result in
similar or better differential gain and differential phase
performance.
NTSC
The ISL59833 (generating a negative rail internally) is ideally
suited for NTSC video with its accompanying negative-going
sync signals, which is easily handled by the ISL59833
without the need for an additional supply as the ISL59833
generates a negative rail with an internal charge pump
referenced at negative 1/2 the positive supply.
YPbPr
YPbPr signals originating from a DVD player requiring three
channels of very tightly-controlled amplifier gain accuracy
present no difficulty for the ISL59833. Specifically, this
standard encodes sync on the Y channel and it is a negative-
going signal, which is easily handled by the ISL59833
without the need for an additional supply as the ISL59833
generates a negative rail placed at negative 1/2 the positive
supply. Additionally, the Pb and Pr are bipolar analog signals
and the video signals are negative-going, and again, easily
handled by the ISL59833.
DRIVING CAPACITIVE LOADS AND CABLES
The ISL59833 (internally-compensated to drive 75Ω cables)
will drive 10pF loads in parallel with 1kΩ with less than 5dB
of peaking. If less peaking is required, a small series resistor,
usually between 5Ω to 50Ω, can be placed in series with the
output. This will reduce peaking at the expense of a slight
closed loop gain reduction. When used as a cable driver,
double termination is always recommended for reflection-
free performance. For those applications, a back-termination
series resistor at the amplifier's output will isolate the
amplifier from the cable and allow extensive capacitive drive.
However, other applications may have high capacitive loads
without a back-termination resistor. Again, a small series
resistor at the output can help to reduce peaking. The
ISL59833 is a triple amplifier designed to drive three
channels; simply deal with each channel separately as
described in this section.
DC-RESTORE
When the ISL59833 is AC-coupled it becomes necessary to
restore the DC reference for the signal. This is accomplished
with a DC-restore system applied between the capacitive
"AC" coupling and the input of the device. Refer to
“ISL59833 + DC-Restore Solution” on page 10.
AMPLIFIER DISABLE
The ISL59833 can be disabled and its output placed in a
high impedance state. The turn-off time is around 25ns and
the turn-on time is around 200ns. When disabled, the
amplifier's supply current is reduced to 80mA typically,
reducing power consumption. The amplifier's power-down
can be controlled by standard TTL or CMOS signal levels at
the EN
pin. The applied logic signal is relative to the GND
pin. Letting the EN
pin float or applying a signal that is less
than 0.8V above GND will enable the amplifier. The amplifier
will be disabled when the signal at EN
pin is 2V above GND.
The V
EE
charge pump remains active.
OUTPUT DRIVE CAPABILITY
The ISL59833 does not have internal short-circuit protection
circuitry. A short-circuit current of 80mA sourcing and 150mA
sinking for the output is connected half way between the rails
with a 10Ω resistor. If the output is shorted indefinitely, the
power dissipation could easily increase such that the part will
be destroyed. Maximum reliability is maintained if the output
ISL59833
14
FN6334.1
March 5, 2007
current never exceeds ±40mA, after which the electro-
migration limit of the process will be exceeded and the part
will be damaged. This limit is set by the design of the internal
metal interconnections.
POWER DISSIPATION
With the high output drive capability of the ISL59837, it is
possible to exceed the
+150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
T
JMAX
= Maximum junction temperature
T
AMAX
= Maximum ambient temperature
Θ
JA
= Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
for sinking:
Where:
V
S
= Supply voltage
I
SMAX
= Maximum quiescent supply current
V
OUT
= Maximum output voltage of the application
R
LOAD
= Load resistance tied to ground
I
LOAD
= Load current
i = Number of output channels
By setting the two P
DMAX
equations equal to each other, we
can solve the output current and R
LOAD
to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
Strip line design techniques are recommended for the input
and output signal traces. As with any high frequency device,
a good printed circuit board layout is necessary for optimum
performance. Lead lengths should be as short as possible.
The power supply pin must be well bypassed to reduce the
risk of oscillation. For normal single supply operation, where
the V
S
- pin is connected to the ground plane, a single 4.7µF
tantalum capacitor in parallel with a 0.1µF ceramic capacitor
from V
S
+ to GND will suffice. This same capacitor
combination should be placed at each supply pin to ground if
split-internal supplies are to be used. In this case, the V
S
-
pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is also very important.
PD
MAX
T
JMAX
T
AMAX
Θ
JA
---------------------------------------------
=
(EQ. 1)
PD
MAX
V
S
I
SMAX
V
S
V
OUT
i()+×
V
OUT
i
R
L
i
-----------------
×=
(EQ. 2)
PD
MAX
V
S
I
SMAX
V
OUT
iV
S
()+× I
LOAD
i×=
(EQ. 3)
ISL59833
15
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FN6334.1
March 5, 2007
ISL59833
Quarter Size Outline Plastic Packages Family (QSOP)
0.010 C A B
SEATING
PLANE
DETAIL X
E E1
1
(N/2)
(N/2)+1
N
PIN #1
I.D. MARK
b
0.004 C
c
A
SEE DETAIL "X"
A2
4°±4°
GAUGE
PLANE
0.010
L
A1
D
B
H
C
e
A
0.007 C A B
L1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
SYMBOL
INCHES
TOLERANCE NOTESQSOP16 QSOP24 QSOP28
A 0.068 0.068 0.068 Max. -
A1 0.006 0.006 0.006 ±0.002 -
A2 0.056 0.056 0.056 ±0.004 -
b 0.010 0.010 0.010 ±0.002 -
c 0.008 0.008 0.008 ±0.001 -
D 0.193 0.341 0.390 ±0.004 1, 3
E 0.236 0.236 0.236 ±0.008 -
E1 0.154 0.154 0.154 ±0.004 2, 3
e 0.025 0.025 0.025 Basic -
L 0.025 0.025 0.025 ±0.009 -
L1 0.041 0.041 0.041 Basic -
N 16 24 28 Reference -
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.

ISL59833IAZ-EVALZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Amplifier IC Development Tools ISL9104AIRUN EVALBRD 1 6LD U 3 3V RHS
Lifecycle:
New from this manufacturer.
Delivery:
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