SI1902DL-T1-GE3

www.vishay.com
4
Document Number: 71080
S11-2043-Rev. J, 17-Oct-11
Vishay Siliconix
Si1902DL
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71080
.
Threshold Voltage
- 0.4
- 0.3
- 0.2
- 0.1
0
0.1
0.2
- 50 - 25 0 25 50 75 100 125 150
I
D
= 250 µA
Variance (V) V
GS(th)
T
J
- Temperature (°C)
Single Pulse Power, Junction-to-Ambient
0
3
5
1
2
Power (W)
Time (s)
4
1 100 6001010
-1
10
-2
10
-3
Normalized Thermal Transient Impedance, Junction-to-Ambient
10
-3
10
-2
1 10 60010
-1
10
-4
100
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Square Wave Pulse Duration (s)
Normalized Ef fective T ransient
Thermal Impedance
1. Duty Cycle, D =
2. Per Unit Base = R
th JA
= 400 °C/W
3. T
JM
- T
A
= P
DM
Z
thJA
(t)
t
1
t
2
t
1
t
2
Notes:
4. Surface Mounted
P
DM
Normalized Thermal Transient Impedance, Junction-to-Foot
10
-3
10
-2
11010
-1
10
-4
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Square Wave Pulse Duration (s)
Normalized Ef fective Transient
Thermal Impedance
L
c
E
E
1
e
D
e
1
A
2
A
A
1
1
-A-
b
-B-
23
654
Package Information
Vishay Siliconix
Document Number: 71154
06-Jul-01
www.vishay.com
1
SCĆ70: 6ĆLEADS
MILLIMETERS INCHES
Dim Min Nom Max Min Nom Max
A
0.90 1.10 0.035 0.043
A
1
0.10 0.004
A
2
0.80 1.00 0.031 0.039
b
0.15 0.30 0.006 0.012
c
0.10 0.25 0.004 0.010
D
1.80 2.00 2.20 0.071 0.079 0.087
E
1.80 2.10 2.40 0.071 0.083 0.094
E
1
1.15 1.25 1.35 0.045 0.049 0.053
e
0.65BSC 0.026BSC
e
1
1.20 1.30 1.40 0.047 0.051 0.055
L
0.10 0.20 0.30 0.004 0.008 0.012
7_Nom 7_Nom
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5550
AN814
Vishay Siliconix
Document Number: 71237
12-Dec-03
www.vishay.com
1
Dual-Channel LITTLE FOOTR SC-70 6-Pin MOSFET
Recommended Pad Pattern and Thermal Performance
INTRODUCTION
This technical note discusses the pin-outs, package outlines,
pad patterns, evaluation board layout, and thermal
performance for dual-channel LITTLE FOOT power
MOSFETs in the SC-70 package. These new Vishay Siliconix
devices are intended for small-signal applications where a
miniaturized package is needed and low levels of current
(around 250 mA) need to be switched, either directly or by
using a level shift configuration. Vishay provides these devices
with a range of on-resistance specifications in 6-pin versions.
The new 6-pin SC-70 package enables improved
on-resistance values and enhanced thermal performance.
PIN-OUT
Figure 1 shows the pin-out description and Pin 1 identification
for the dual-channel SC-70 device in the 6-pin configuration.
FIGURE 1.
SOT-363
SC-70 (6-LEADS)
6
4
1
2
3
5
Top View
S
1
G
1
D
2
D
1
G
2
S
2
For package dimensions see outline drawing SC-70 (6-Leads)
(http://www.vishay.com/doc?71154)
BASIC PAD PATTERNS
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286) for the 6-pin
SC-70. This basic pad pattern is sufficient for the low-power
applications for which this package is intended. For the 6-pin
device, increasing the pad patterns yields a reduction in
thermal resistance on the order of 20% when using a 1-inch
square with full copper on both sides of the printed circuit board
(PCB).
EVALUATION BOARDS FOR THE DUAL
SC70-6
The 6-pin SC-70 evaluation board (EVB) measures 0.6 inches
by 0.5 inches. The copper pad traces are the same as
described in the previous section, Basic Pad Patterns. The
board allows interrogation from the outer pins to 6-pin DIP
connections permitting test sockets to be used in evaluation
testing.
The thermal performance of the dual SC-70 has been
measured on the EVB with the results shown below. The
minimum recommended footprint on the evaluation board was
compared with the industry standard 1-inch square FR4 PCB
with copper on both sides of the board.
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(the Package Performance)
Thermal performance for the dual SC-70 6-pin package
measured as junction-to-foot thermal resistance is 300_C/W
typical, 350_C/W maximum. The “foot” is the drain lead of the
device as it connects with the body. Note that these numbers
are somewhat higher than other LITTLE FOOT devices due to
the limited thermal performance of the Alloy 42 lead-frame
compared with a standard copper lead-frame.
Junction-to-Ambient Thermal Resistance
(dependent on PCB size)
The typical Rθ
JA
for the dual 6-pin SC-70 is 400_C/W steady
state. Maximum ratings are 460_C/W for the dual. All figures
based on the 1-inch square FR4 test board. The following
example shows how the thermal resistance impacts power
dissipation for the dual 6-pin SC-70 package at two different
ambient temperatures.

SI1902DL-T1-GE3

Mfr. #:
Manufacturer:
Vishay / Siliconix
Description:
MOSFET 20V .66A .27W
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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