LTC1644
13
1644f
APPLICATIO S I FOR ATIO
WUU
U
Figure 3. Normal Power-Down Sequence
Figure 2. Normal Power-Up Sequence
TIMER
During a power-up sequence, a 21µA current source is
connected to the TIMER pin (Pin 4) and current limit faults
are ignored until the voltage ramps to within 1V of 12V
IN
(Pin 1). This feature allows the chip to power up CPCI
boards with widely varying capacitive loads on the sup-
plies. The power-up time for any one of the four outputs is
given by Equation 2:
tXV
CXV
II
ON OUT
LOAD XVOUT OUT
LIMIT XVOUT LOAD XVOUT
()
=•
2
()
() ()
(2)
where XV
OUT
= 5V
OUT
, 3V
OUT
, 12V
OUT
or V
EEOUT
(–12V).
For example, for C
LOAD(5VOUT)
= 2000µF, I
LIMIT(5VOUT)
=
7A and I
LOAD(5VOUT)
= 5A, the 5V
OUT
turn-on time will be
~10ms. By substituting the variables in Equation 2 with the
appropriate values, the turn-on time for the other three
outputs can be calculated.
The timer period should be set longer than the maximum
supply turn-on time but short enough to not exceed the
maximum safe operating area of the pass transistor during
a short circuit. The timer period for the LTC1644 is given
by:
t
CV
A
TIMER
TIMER
=
µ
11
21
(3)
As a design aid, the timer period as a function of the timing
capacitor using standard values from 0.01µF to 1µF is
shown in Table 2.
TIMER
10V/DIV
GATE
5V/DIV
12V
OUT
10V/DIV
V
EEOUT
10V/DIV
5V
OUT
10V/DIV
3V
OUT
10V/DIV
LOCAL_PCI_RST#
5V/DIV
BD_SEL#
5V/DIV
HEALTHY#
5V/DIV
PRECHARGE
5V/DIV
10ms/DIV
1644 F02
TIMER
10V/DIV
GATE
5V/DIV
12V
OUT
10V/DIV
V
EEOUT
10V/DIV
5V
OUT
10V/DIV
3V
OUT
10V/DIV
LOCAL_PCI_RST#
5V/DIV
BD_SEL#
5V/DIV
HEALTHY#
5V/DIV
PRECHARGE
5V/DIV
10ms/DIV
1644 F03
LTC1644
14
1644f
APPLICATIO S I FOR ATIO
WUU
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Table 2. t
TIMER
vs C
TIMER
C
TIMER
t
TIMER
C
TIMER
t
TIMER
0.01µF 5.24ms 0.22µF 115ms
0.022µF 11.5ms 0.33µF 173ms
0.033µF 17.3ms 0.47µF 246ms
0.047µF 24.6ms 0.68µF 356ms
0.068µF 35.6ms 0.82µF 430ms
0.082µF 43.0ms 1µF 524ms
0.1µF 52.4ms
The TIMER pin is immediately pulled low when the BD_SEL#
signal goes high.
Thermal Shutdown
The internal switches for the 12V and –12V supplies are
protected by an internal current limit and a thermal shut-
down circuit. When the temperature of the chip reaches
130°C, all switches will be latched off and the FAULT pin
(Pin␣ 6) will be pulled low.
Short-Circuit Protection
During a normal power-up sequence, if the TIMER (Pin 4)
is done ramping and any supply is still in current limit, all
of the pass transistors will be immediately turned off and
FAULT (Pin 6) will be pulled low as shown in Figure 4.
In order to prevent excessive power dissipation in the pass
transistors and to prevent voltage spikes on the supplies
during short-circuit conditions, the current limit on each
supply is designed to be a function of the output voltage.
As the output voltage drops, the current limit decreases.
Unlike a traditional circuit breaker function where large
currents can flow before the breaker trips, the current
foldback feature assures that the supply current will be
kept at a safe level. In addition, current foldback prevents
voltage glitches when powering up into a short.
If either the 12V or –12V supply exceeds current limit after
power up, the shorted supply’s current will drop immedi-
ately to its I
LIMIT
value. If that supply remains in current
limit for more that 45µs, all of the supplies will be latched
off. The 45µs delay prevents quick current spikes—for
example, from a fan turning on—from causing false trips
of the circuit breaker.
After power-up, the 5V and 3.3V supplies are protected
from overcurrent and short-circuit conditions by dual-
level circuit breakers. In the event that either supply
current exceeds the nominal limit but is less than 3 times
the current limit, an internal timer is started. If the supply
is still overcurrent after 45µs, the circuit breaker trips and
all the supplies are turned off (Figure 5). If a short-circuit
occurs and the supply current exceeds 3 times the set
limit, the circuit breakers trip without any delay and the
chip latches off (Figure 6). The chip will stay in the latched
off state until OFF/ON (Pin 5) is cycled high then low or the
12V
IN
(Pin 1) power supply is cycled off then on.
The current limit and the foldback current level for the 5V
and 3.3V outputs are both a function of the external sense
resistor (R1 for 3V
OUT
and R2 for 5V
OUT
, see Figure 1). As
shown in Figure 1, a sense resistor is connected between
5V
IN
(Pin 13) and 5V
SENSE
(Pin 12) for the 5V supply. For
the 3V supply, a sense resistor is connected between 3V
IN
(Pin 9) and 3V
SENSE
(Pin 10). The current limit and the
foldback current level are given by Equations 4 and 5:
I
mV
R
LIMIT XVOUT
SENSE XVOUT
()
()
=
51
(4)
I
mV
R
FOLDBACK XVOUT
SENSE XVOUT
()
()
=
12
(5)
where XV
OUT
= 5V
OUT
or 3V
OUT
.
As a design aid, the current limit and foldback level for
commonly used values for R
SENSE
is shown in Table 3.
Table 3. I
LIMIT(XVOUT)
and I
FOLDBACK(XVOUT)
vs R
SENSE
R
SENSE
()I
LIMIT(XVOUT)
I
FOLDBACK(XVOUT)
0.005 10.2A 2.4A
0.006 8.5A 2.0A
0.007 7.3A 1.7A
0.008 6.4A 1.5A
0.009 5.7A 1.3A
0.01 5.1A 1.2A
where XV
OUT
= 3V
OUT
or 5V
OUT
.
The current limit for the internal 12V switch is set at
840mA folding back to 360mA and the –12V switch at
320mA folding back to 100mA.
LTC1644
15
1644f
TIMER
10V/DIV
GATE
10V/DIV
5V
IN
– 5V
SENSE
100mV/DIV
50mV
FAULT
5V/DIV
20µs/DIV
1644 F05
TIMER
10V/DIV
GATE
10V/DIV
5V
IN
– 5V
SENSE
100mV/DIV
FAULT
5V/DIV
10µs/DIV
1644 F06
150mV
Figure 5. Overcurrent Fault on 5V Figure 6. Short-Circuit Fault on 5V
20ms/DIV
1644 F04
TIMER
10V/DIV
GATE
5V/DIV
12V
OUT
10V/DIV
V
EEOUT
10V/DIV
5V
OUT
5V/DIV
3V
OUT
5V/DIV
LOCAL_PCI_RST#
5V/DIV
BD_SEL#
5V/DIV
FAULT
5V/DIV
HEALTHY#
5V/DIV
PRECHARGE
5V/DIV
Figure 4. Power-Up into a Short on 3.3V Output
APPLICATIO S I FOR ATIO
WUU
U

LTC1644IGN#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers CompactPCI Bus Hot Swap Cntr
Lifecycle:
New from this manufacturer.
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