NCP2890, NCV2890
http://onsemi.com
10
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 31. Power Dissipation versus Output
Power
0 0.2
0.7
0
0.1
P
D
, POWER DISSIPATION (W)
P
out
, OUTPUT POWER (W)
Figure 32. Power Dissipation versus Output
Power
0 0.1 0.2 0.3
0.3
0
0.1
P
D
, POWER DISSIPATION (W)
P
out
, OUTPUT POWER (W)
V
p
= 5 V
R
L
= 8
F = 1 kHz
THD + N < 0.1%
V
p
= 3.3 V
R
L
= 8
F = 1 kHz
THD + N < 0.1%
Figure 33. Power Dissipation versus Output
Power
0 0.1 0.2 0.3 0.4
0.25
0
0.05
P
D
, POWER DISSIPATION (W)
P
out
, OUTPUT POWER (W)
Figure 34. Power Dissipation versus Output
Power
0 0.05 0.1 0.15 0.4
0.4
0
0.1
P
D
, POWER DISSIPATION (W)
P
out
, OUTPUT POWER (W)
V
p
= 3 V
R
L
= 8
F = 1 kHz
THD + N < 0.1%
Figure 35. Power Derating − 9−Pin Flip−Chip CSP
0 20 160
700
0
P
D
, POWER DISSIPATION (mW)
T
A
, AMBIENT TEMPERATURE (°C)
Figure 36. Maximum Die Temperature versus
PCB Heatsink Area
50 100 250
180
40
60
DIE TEMPERATURE (°C) @
AMBIENT TEMPERATURE 25°C
PCB HEATSINK AREA (mm
2
)
120
150 200
0.5
0.4 0.6 0.8 1 1.2
0.2
0.4 0.
5
0.1
100
200
300
400
500
600
80
100
160
140
P
Dmax
= 633 mW
for V
p
= 5 V,
R
L
= 8
0.2
0.3
0.4
0.6
0.05
0.15
0.25
0.15
0.2
0.2 0.25 0.3 0.35
0.05
0.2
0.15
0.3
0.25
0.35
V
p
= 2.6 V
F = 1 kHz
THD + N < 0.1%
R
L
= 8
R
L
= 4
40 60 80 100 120 140
PCB Heatsink Area
500 mm
2
50 mm
2
200 mm
2
300
Maximum Die Temperature 150°C
V
p
= 2.6 V
V
p
= 5 V
V
p
= 3.3 V
V
p
= 4.2 V
R
L
= 8
NCP2890, NCV2890
http://onsemi.com
11
APPLICATION INFORMATION
Detailed Description
The NCP2890 audio amplifier can operate under 2.6 V
until 5.5 V power supply. It delivers 320 mW rms output
power to 4.0 load (V
p
= 2.6 V) and 1.0 W rms output
power to 8.0 load (V
p
= 5.0 V).
The structure of the NCP2890 is basically composed of
two identical internal power amplifiers; the first one is
externally configurable with gain−setting resistors R
in
and
R
f
(the closed−loop gain is fixed by the ratios of these
resistors) and the second is internally fixed in an inverting
unity−gain configuration by two resistors of 20 k. So the
load is driven differentially through OUTA and OUTB
outputs. This configuration eliminates the need for an
output coupling capacitor.
Internal Power Amplifier
The output PMOS and NMOS transistors of the amplifier
were designed to deliver the output power of the
specifications without clipping. The channel resistance
(R
on
) of the NMOS and PMOS transistors does not exceed
0.6 when they drive current.
The structure of the internal power amplifier is
composed of three symmetrical gain stages, first and
medium gain stages are transconductance gain stages to
obtain maximum bandwidth and DC gain.
Turn−On and Turn−Off Transitions
A cycle with a turn−on and turn−off transition is
illustrated with plots that show both single ended signals on
the previous page.
In order to eliminate “pop and click” noises during
transitions, output power in the load must be slowly
established or cut. When logic high is applied to the
shutdown pin, the bypass voltage begins to rise
exponentially and once the output DC level is around the
common mode voltage, the gain is established slowly
(50 ms). This way to turn−on the device is optimized in
terms of rejection of “pop and click” noises.
The device has the same behavior when it is turned−off
by a logic low on the shutdown pin. During the shutdown
mode, amplifier outputs are connected to the ground.
When a shutdown low level is applied, it takes 350 ms
before the DC output level is tied to Ground. However, as
shown on Figure 30, the turn off time of the audio signal is
40 ms.
A theoretical value of turn−on time at 25°C is given by
the following formula.
C
by
: bypass capacitor
R: internal 300 k resistor with a 25% accuracy
T
on
= 0.95 * R * C
by
(285 ms with C
by
= 1 F)
If a faster turn on time is required then a lower bypass
capacitor can be used. The other option is to use NCP2892
which offers 100 ms with 1 F bypass capacitor.
Shutdown Function
The device enters shutdown mode when shutdown signal
is low. During the shutdown mode, the DC quiescent
current of the circuit does not exceed 100 nA.
Current Limit Circuit
The maximum output power of the circuit (Porms =
1.0 W, V
p
= 5.0 V, R
L
= 8.0 ) requires a peak current in
the load of 500 mA.
In order to limit the excessive power dissipation in the
load when a short−circuit occurs, the current limit in the
load is fixed to 800 mA. The current in the four output MOS
transistors are real−time controlled, and when one current
exceeds 800 mA, the gate voltage of the MOS transistor is
clipped and no more current can be delivered.
Thermal Overload Protection
Internal amplifiers are switched off when the
temperature exceeds 160°C, and will be switched on again
only when the temperature decreases fewer than 140°C.
The NCP2890 is unity−gain stable and requires no
external components besides gain−setting resistors, an
input coupling capacitor and a proper bypassing capacitor
in the typical application.
The first amplifier is externally configurable (R
f
and
R
in
), while the second is fixed in an inverting unity gain
configuration.
The differential−ended amplifier presents two major
advantages:
The possible output power is four times larger (the
output swing is doubled) as compared to a single−ended
amplifier under the same conditions.
Output pins (OUTA and OUTB) are biased at the same
potential V
p
/2, this eliminates the need for an output
coupling capacitor required with a single−ended
amplifier configuration.
The differential closed loop−gain of the amplifier is
given by A
vd
+ 2*
R
f
R
in
+
V
orms
V
inrms
.
Output power delivered to the load is given by
P
orms
+
(Vopeak)
2
2*R
L
(Vopeak is the peak differential
output voltage).
When choosing gain configuration to obtain the desired
output power, check that the amplifier is not current limited
or clipped.
The maximum current which can be delivered to the load
is 500 mA I
opeak
+
V
opeak
R
L
.
NCP2890, NCV2890
http://onsemi.com
12
Gain−Setting Resistor Selection (R
in
and R
f
)
R
in
and R
f
set the closed−loop gain of the amplifier.
In order to optimize device and system performance, the
NCP2890 should be used in low gain configurations.
The low gain configuration minimizes THD + noise
values and maximizes the signal to noise ratio, and the
amplifier can still be used without running into the
bandwidth limitations.
A closed loop gain in the range from 2 to 5 is
recommended to optimize overall system performance.
An input resistor (R
in
) value of 22 k is realistic in most
of applications, and doesn’t require the use of a too large
capacitor C
in
.
Input Capacitor Selection (C
in
)
The input coupling capacitor blocks the DC voltage at
the amplifier input terminal. This capacitor creates a
high−pass filter with R
in
, the cut−off frequency is given by
fc +
1
2* *R
in
*C
in
.
The size of the capacitor must be large enough to couple
in low frequencies without severe attenuation. However a
large input coupling capacitor requires more time to reach
its quiescent DC voltage (V
p
/2) and can increase the
turn−on pops.
An input capacitor value between 0.1 and 0.39 F
performs well in many applications (With R
in
= 22 K).
Bypass Capacitor Selection (Cby)
The bypass capacitor Cby provides half−supply filtering
and determines how fast the NCP2890 turns on.
This capacitor is a critical component to minimize the
turn−on pop. A 1.0 F bypass capacitor value
(C
in
= < 0.39 F) should produce clickless and popless
shutdown transitions. The amplifier is still functional with
a 0.1 F capacitor value but is more susceptible to “pop and
click” noises.
Thus, a 1.0 F bypassing capacitor is recommended.
Figure 37. Schematic of the Demonstration Board of the 9−Pin Flip−Chip CSP Device
+
+
V
p
INM
V
p
V
p
300 k
300 k
8
OUTA
OUTB
20 k
20 k
INP
BYPASS
20 k
1 F
390 nF
VMVM_P
SHUTDOWN
CONTROL
C3
1 FC1
SHUTDOWN
R2
C2
AUDIO
INPUT
V
p
R3
20 k
R4*
R1
100 k
C4*
* R4, C4: Not Mounted

NCP2890DMR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Audio Amplifiers 1W Audio Power Industrial Temp
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union