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DS1090U-2/V+

P1-P3P4-P6P7-P8
DS1090
Low-Frequency, Spread-Spectrum
EconOscillator
_____________________________________________________________________ 7
Detailed Description
The DS1090 is a center-dithered, spread-spectrum sili-
con oscillator for use as an external clock in reduced-
EMI applications. With a combination of factory-
programmed prescalers and a user-selected external
resistor, output frequencies from 125kHz to 8MHz can
be achieved. The output center frequency can be
dithered by selecting the desired dither rate and ampli-
tude with discrete inputs J0, J1, JC0, and JC1.
The DS1090 contains four basic circuit blocks: master
oscillator, factory-programmed prescaler, dither gener-
ator, and the voltage-bias circuit that provides the feed-
back path to the master oscillator for frequency control
and dithering functions.
Master Oscillator
The master oscillator is programmable in the applica-
tion by the use of an external resistor (R
SET
) tied to
ground (GND). Resistor values of 45kΩ to 91kΩ vary
the square-wave output frequency of the voltage-con-
trolled master oscillator (f
MOSC
) from 8MHz down to
4MHz (see Figure 1).
The master oscillator (Hz) frequency can be stated as
Factory-Programmed Prescaler
The prescaler divides the frequency of the master oscil-
lator by 1, 2, 4, 8, 16, or 32 to generate the square-
wave output clock (f
OSC
). This divisor is factory-set and
is an ordering option.
Dither Generator
Spread-spectrum functionality is achieved by a user-
configurable divider (determines dither rate), a triangle
generator, and a user-configurable dither amplitude cir-
cuit (see
Block Diagram
).
The input to the triangle-wave generator is derived from
the internal master oscillator and is fed through a user-
configurable divider. The settings of control pins JC0
and JC1 determine this dither rate divisor setting (see
Table 1), dividing the master clock by 4, 8, 16, or 32.
The clock signal is further divided by 128 in the
triangle-wave generator, which results in a triangle-
wave signal of either 1/512th, 1/1024th, 1/2048th, or
1/4096th of the master oscillator (f
MOD
), depending
upon the user’s divisor setting.
The dithering frequency can be also expressed as the
result of
where Divisor is 4, 8, 16, or 32.
f
f
Divisor
MOD
MOSC
=
×128
f
E
sistor
MOSC
≅
+3 6461 11.
Re
MASTER OSCILLATOR FREQUENCY vs.
EXTERNAL RESISTOR SELECTION
DS1090 fig01
R
SET
RESISTANCE (kΩ)
f
MOSC
(MHz)
90
80
7060
50
4
5
6
7
8
9
3
40
Figure 1. Master Oscillator Frequency
f
MOSC
TIME
DITHER
AMOUNT
(2, 4, OR 8%)
IF DITHER AMOUNT = 0%
(- 1, 2, or 4% of f
MOSC
)
f
MOD
1
(+ 1, 2, or 4% of f
MOSC
)
Programmed f
MOSC
Figure 2. Center Frequency Dither Diagram
JC1 JC0
DITHERING PERCENTAGE
(f
MOSC
/n)
DIVISOR
SETTING
00 F
MOSC
/ 512 4
01 F
MOSC
/ 1024 8
10 f
MOSC
/ 2048 16
11 f
MOSC
/ 4096 32
Table 1. Dither Rate Divisor Settings
DS1090
Low-Frequency, Spread-Spectrum
EconOscillator
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8
_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products.
is a registered trademark of Dallas Semiconductor Corporation.
Dither Percentage Settings
Dither amplitude (measured in percent ± from the mas-
ter oscillator center frequency) is set using input pins
J0 and J1. This circuit uses a sense current from the
master oscillator bias circuit to adjust the amplitude of
the triangle-wave signal to a voltage level that modu-
lates the master oscillator to a percentage of its resis-
tor-set center frequency. This percentage is set in the
end application to be 0%, 2%, 4%, or 8% (see Table 2).
Application Information
Pin Connection
The DS1090 is intended to provide a fixed-frequency,
dithered clock to be used as a clock driver for DC-DC
converters and other applications requiring a low-
frequency EMI-reduced clock oscillator. All control pins
must be biased per Tables 1 and 2 for proper operation
for the individual application’s requirements. R
SET
must
be tied to ground (GND) by a customer-supplied resistor.
R
SET
Resistor Selection
The value of the resistor used to select the desired fre-
quency is calculated using the formula in the
Master
Oscillator
section (see also Figure 1). It is recommended
to use, at minimum, a 1%-tolerance, 1/16th-watt compo-
nent with a temperature coefficient that satisfies the over-
all stability requirements desired of the end-equipment.
Place the external R
SET
resistor as close as possible to
minimize lead inductance.
Power-Supply Decoupling
To achieve best results, it is highly recommended that a
decoupling capacitor is used on the IC power-supply
pins. Typical values of decoupling capacitors are 0.01µF
and 0.1µF. Use a high-quality, ceramic, surface-mount
capacitor, and mount it as close as possible to the V
CC
and GND pins of the IC to minimize lead inductance.
J1 J0 DITHER PERCENT (%)
00 0
01 2
10 4
11 8
Table 2. Dither Percentage Setting
Package Information
For the latest package outline information, go to
www.maxim-ic.com/DallasPackInfo
.
Chip Information
TRANSISTOR COUNT: 1883
SUBSTRATE CONNECTED TO GROUND
P1-P3P4-P6P7-P8

DS1090U-2/V+

Mfr. #:
Buy DS1090U-2/V+
Manufacturer:
Maxim Integrated
Description:
Clock Generators & Support Products AEC-Q100 QUALIFIED DS1090U-2+
Lifecycle:
New from this manufacturer.
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