This technical summary provides an overview of the MPC184 security processor, including a
brief development history, target applications, key features, typical system architecture, device
architectural overview, and a performance summary.
1 Development History
The MPC184 belongs to the Smart Networks platform’s S1 family of security processors
developed for the commercial networking market. This product family is derived from
security technologies Motorola has developed over the last 30 years, primarily for government
applications. The fifth-generation execution units (EU) have been proven in Motorola
semi-custom ICs and in other members of the S1 family, including the MPC180, MPC190,
and MPC185.
2 Typical Applications
The MPC184 is suited for applications such as the following:
SOHO VPN routers
Customer Premise Equipment
Wireless Access Points
eCommerce servers
Dedicated Encryption Modules
3 Features
The MPC184 is a flexible and powerful addition to any networking or computing system using
the Motorola PowerQUICCline of integrated communications processors, or any system
supporting 32-bit PCI. The MPC184 is designed to off load computationally intensive security
functions, such as key generation and exchange, authentication, and bulk encryption from the
host processor.
The MPC184 is optimized to process all the algorithms associated with IPSec, IKE,
WTLS/WAP, SSL/TLS, DOCSIS BPI+, 802.16, and 802.11(WEP). In addition, the Motorola
family of security co-processors are the only devices on the market capable of executing
Advance Information
MPC184TS/D
Rev. 1.1, 2/2003
MPC184 Security Processor
Technical Summary
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2 MPC184 Security Processor Technical Summary MOTOROLA
Elliptic Curve Cryptography which is especially important for secure wireless communications.
MPC184 features include the following:
Public key execution units (PKEU) that supports the following:
RSA and Diffie-Hellman
Programmable field size up to 2048-bits
Elliptic curve cryptography
F
2
m and F(p) modes
Programmable field size up to 511-bits
Data Encryption Standard execution units (DEU)
DES, 3DES
Two key (K1, K2, K1) or Three Key (K1, K2, K3)
ECB and CBC modes for both DES and 3DES
Advanced Encryption Standard unit (AESU)
Implements the Rinjdael symmetric key cipher
Key lengths of 128, 192, and 256 bits.Two key
ECB, CBC, and Counter modes
ARC Four execution unit (AFEU)
Implements a stream cipher compatible with the RC4 algorithm
40- to 128-bit programmable key
Message digest execution units (MDEU)
SHA with 160-bit or 256-bit message digest
MD5 with 128-bit message digest
HMAC with either algorithm
Random number generator (RNG)
8xx compliant external bus interface, with master/slave logic.
32-bit address/32 -bit data
up to 66MHz operation
Optional PCI 2.2 compliant external bus interface with master/slave logic.
32-bit address/data
up to 66MHz operation
4 Crypto-channels, each supporting multi-command descriptor chains
Static and/or dynamic assignment of crypto-execution units via an integrated controller
Buffer size of 512 Bytes for each execution unit, with flow control for large data sizes
8KB of internal scratchpad memory for key, IV and context storage
1.5V supply, 3.3V I/O
252MAP BGA, 21x 21mm package body size
1.0W power dissipation
4 Typical System Architecture
The MPC184 is designed to integrate easily into any system using the 8xx or PCI bus protocol. The
MPC184 is ideal in any system using a Motorola PowerQUICC communications processor (as shown in
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MOTOROLA MPC184 Security Processor Technical Summary 3
Figure 4-1) or any system using PCI. The ability of the MPC184 to be a master on the 8xx bus allows the
co-processor to offload the data movement bottleneck normally associated with slave devices. The external
processor accesses the MPC184 through its device drivers using system memory for data storage. The
MPC184 resides in the memory map of the processor, therefore when an application requires cryptographic
functions, it simply creates descriptors for the MPC184 which define the cryptographic function to be
performed and the location of the data. The MPC184’s mastering capability permits the host processor to
set up a crypto-channel with a few short register writes, leaving the MPC184 to perform reads and writes
on system memory to complete the required task.
Figure 4-1. MPC184 Connected to PowerQuicc 8xx Bus
Figure 4-2 shows a configuration with the MPC184 communicating with an MPC824x host processor via a
integrated PCI bus.
Figure 4-2. MPC184 Connected to host CPU via PCI bus
MPC860
MPC184
EEPROM
Main
I/O or Network
Interface
8xx Bus
Memory
PCI Local Bus
Memory Bus
Main
Memory
Network
Interface Card
MPC184
Network
Interface Card
MPC8245
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MPC184VMB

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC SECURITY PROCESSOR 252MAPBGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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