LTC2952
19
2952fb
Figure 9. Setting the Comparator Trip Point
0.5V
PIN
V
TRIP
2952 F09
+
+
R2
1%
R1
1%
APPLICATIONS INFORMATION
Accurate Comparator Input Pins
VM, PFI, KILL, M1 and M2
VM, PFI, KILL, M1 and M2 are high impedance input pins
to accurate comparators with a falling threshold of 0.500V.
Note the following differences between some of these pins:
the VM pin comparator has no hysteresis while the other
comparators have 15mV hysteresis and the M1 pin has a
3μA pull-up current while the other input pins do not.
Figure 9 shows the configuration of a typical application
when VM, PFI, KILL or M2 pin connects to a tap point on
an external resistive divider between a positive voltage
and ground.
Calculate the falling trip voltage from the resistor divider
value using:
V
FALLINGTRIP
= 0.5V 1+
R1
R2
Table 1 shows suggested 1% resistor values for various
applications.
Table 1. Suggested 1% Resistor Values for the Accurate
Comparators (–6.5% Nominal Threshold)
V
SUPPLY
(V)
V
TRIP
(V)
R1
(kΩ)
R2
(kΩ)
12 11.25 2150 100
10 9.4 1780 100
8 7.5 1400 100
7.5 7 1300 100
6 5.6 1020 100
5 4.725 845 100
3.3 3.055 511 100
3 2.82 464 100
2.5 2.325 365 100
1.8 1.685 237 100
1.5 1.410 182 100
1.2 1.120 124 100
1.0 0.933 86.6 100
0.9 0.840 68.1 100
0.8 0.750 49.9 100
0.7 0.655 30.9 100
0.6 0.561 12.1 100
In a typical application the M1 pin is usually either
connected to ground or left floating. When left floating,
the internal 3μA pull-up drives the M1 pin high above
its rising threshold (0.515V). Note that this 3μA pull-up
current can be used to pull up any or all of the other high
impedance input pins. For example, connect the M2 pin to
the M1 pin to pull both up above their rising thresholds,
as shown in Figure 5.
The Voltage Monitor and Watchdog Function
The first voltage monitor input is PFI. As mentioned
before, this pin is a high impedance input to an accurate
comparator with 15mV hysteresis. When the voltage at
PFI is higher than its rising threshold (0.515V), the PFO
pin is high impedance. Conversely, when the voltage level
at PFI is lower than its falling threshold (0.500V), the PFO
pin strongly pulls down to GND.
The second voltage monitor input is VM. The VM pin
together with the WDE pin (acting as a watchdog monitor
pin) affects the state of the RST output pin. The VM pin is
also a high impedance input to an accurate comparator.
However, the VM comparator has no hysteresis and hence
the same rising and falling threshold (0.500V).
When the voltage level at VM is less than 0.5V, the RST pin
strongly pulls down to GND. When the voltage level at VM
first rises above 0.5V, the RST output pin is held low for
another 200ms (t
RST
) before turning high impedance.
After the RST pin becomes high impedance, if the WDE
input pin is not left in a Hi-Z state, the watchdog timer
is started. The watchdog timer is reset every time there
is an edge (high to low or low to high transition) on the
LTC2952
20
2952fb
Figure 10. Power-On and Power-Off Sequence with
KILL Deasserting EN During KILL Off Wait Time
WDE pin. The watchdog timer can expire due to any of
the following conditions:
1. No valid edge on the WDE pin in a t
WDE
(1.6s) time
period after the RST pin transitions from pulling low
to high impedance.
2. No valid edge on the WDE pin in a t
WDE
(1.6s) time
period since the last valid edge on the WDE pin while
the RST pin is high impedance.
As shown in the Timing Diagrams section, when the
watchdog timer is allowed to expire while voltage at the
VM pin is higher than 0.5V, the RST pin strongly pulls down
to ground for t
RST
(200ms) before again becoming high
impedance for t
WDE
(1.6s). This will continue unless there
is an edge at the WDE pin, the voltage at VM goes below
0.5V, or the watchdog function is disabled (by leaving the
WDE in a Hi-Z state).
In certain PowerPath configurations where both of the
ideal diode drivers are disabled, the watchdog function of
the WDE pin is also disabled. Examples of such configura-
tions are configuration C (Figure 5) and configuration D
(Figure 6) when both of the ideal diode can be turned off
due to a valid pushbutton off or a digital off command.
Power-On/Power-Off Sequence
Figure 10 shows a normal power-on and power-off timing
diagram. Note that in this timing diagram only the clean
internal ON/OFF signal is shown. A transition at this in-
ternal ON/OFF signal can be caused by a valid debounced
pushbutton ON/OFF or a digital ON/OFF through the mode
input pins (M1/M2).
In this timing sequence, the KILL pin has been set low
since power is first applied to the LTC2952. As soon as the
internal ON/OFF signal transitions high (t
1
), the EN pin goes
high impedance and an internal 400ms (t
KILL
,
ON BLANK
)
timer starts. During this 400ms KILL On Blanking period,
the input to KILL pin is ignored and the EN pin remains in
its high impedance state. This KILL On Blanking period
is designed to give the system sufficient time to power
up properly.
Once the μP/system powers on, it sets the KILL pin high
(t
2
) indicating that proper power-up sequence is completed.
Failure to set KILL pin high at the end of the 400ms KILL
On Blanking time (t
3
) will result in immediate system
shutdown (see Aborted Power-On Sequence segment).
After the KILL On Blanking time expires, the system is
now in normal operation with power turned on.
When the internal ON/OFF signal transitions low (t
4
), a
shutdown sequence is immediately started. From the start
of the shutdown sequence, the system power will turn off
in 400ms (t
KILL, OFF
WAIT
), unless an edge (a high-to-low or
low-to-high transition) at the WDE pin is detected within
the 400ms period to extend the wait period for another
400ms.
This KILL Off Wait time (400ms/cycle) is designed to allow
the system to finish performing its housekeeping tasks
before shutdown. Once the μP finishes performing its
power-down operations, it can either let the 400ms KILL
Off Wait time expire on its own or set the KILL pin low
(t
5
) immediately terminating the KILL Off Wait time. When
the KILL Off Wait time expires, the LTC2952 sets EN low,
turning off the DC/DC converter connected to the EN pin.
When the DC/DC converter is turned off (EN goes low), it
can take a significant amount of time for its output level
to decay to ground. In order to guarantee that the μP
has always powered down properly before it is restarted,
another 400ms (Enable Lockout time, t
EN,
LOCKOUT
) timer
is started to allow for the DC/DC converter output power
level to power down completely to ground. During this
Enable Lockout time, the EN pin remains in its low state.
At the end of the 400ms Enable Lockout time (t
6
), the
LTC2952 goes into its reset state with the EN pin remains
strongly pulling down.
APPLICATIONS INFORMATION
2952 F10
KILL
EN
INTERNAL
ON/OFF SIGNAL
t
KILL, ON BLANKING
t
1
t
2
t
3
t
4
t
5
t
6
DON'T CARE
<t
KILL, OFF WAIT
t
EN, LOCKOUT
LTC2952
21
2952fb
Figure 11. Aborted Power-On Sequence
2952 F11
KILL
EN
INTERNAL
ON/OFF SIGNAL
t
KILL, ON BLANKING
t
7
DON'T CARE
t
EN, LOCKOUT
2952 F12
KILL
EN
INTERNAL
ON/OFF SIGNAL
t
KILL, ON BLANKING
t
8
t
9
DON'T CARE
Figure 12. KILL Initiated Shutdown
Extended Power During Turn-Off
In the shutdown process, the availability of power can
be extended by providing edges to the WDE pin during
the KILL Off Wait time. The timing diagram in Figure 13
is similar to the power-on/power-off sequence timing
diagram (Figure 10) except for the edges on the WDE pin
during the shutdown process. At time t
10
, the internal ON/
OFF signal transitions low. When this happens, the DC/DC
converter providing power to the system will be shut off
in 400ms unless the WDE pin is toggled.
When the WDE pin transitions at t
11
, the LTC2952 resets
the 400ms KILL Off Wait timer. Before this second 400ms
wait time expires, the WDE pin transitions again (this time
from high to low) at t
12
, causing the 400ms timer to reset
again. Finally, the third 400ms timer which starts at t
12
expires without any further extension at t
13
causing the
EN pin to go low, shutting down the DC/DC converter.
APPLICATIONS INFORMATION
Figure 13. Power-On/Power-Off Sequence with Extended Shutdown/Housekeeping Wait Time
2952 F13
KILL
EN
INTERNAL
ON/OFF SIGNAL
t
KILL, ON BLANKING
< t
KILL, OFF WAIT
WDE
t
10
t
11
t
12
t
13
DON'T CARE DON'T CARE
EXTENDED HOUSE KEEPING TIME
t
KILL, OFF WAIT
t
EN, LOCKOUT
< t
KILL, OFF WAIT
Aborted Power-On Sequence
The power-on sequence is aborted when the μP fails to
set the KILL pin high before the 400ms KILL On Blanking
time expires, as shown in the timing diagram in Figure 11.
When the KILL On Blanking timer expires (t
7
), the KILL
pin is still low indicating that the μP/system has failed to
power on successfully. When the system failed to set the
KILL pin high within the specified 400ms time window,
the LTC2952 pulls the EN pin low (thus turning off the
DC/DC converter) and as a side effect resets the internal
ON/OFF signal.
KILL Power Turn-Off During Normal Operation
Once the system has powered on and is operating nor-
mally, the system can turn off power by setting KILL low,
as shown in the timing diagram in Figure 12. At t
9
, KILL is
set low and this immediately causes the LTC2952 to pull
EN low, turning off the DC/DC converter.

LTC2952CUF#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Push Button Power Path Controller with System Monitoring
Lifecycle:
New from this manufacturer.
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