M93C56-RDS6TG Datasheet M93C46-RDS6G, M93C46-RDS6TG, M93C56-RDS6G | P4-P6

M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

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SUMMARY DESCRIPTION

These electrically erasable programmable memo-

ry (EEPROM) devices are accessed through a Se-

rial Data Input (D) and Serial Data Output (Q)

using the MICROWIRE bus protocol.

Figure 2. Logic Diagram

Table 1. Signal Names

The memory array organization may be divided

into either bytes (x8) or words (x16) which may be

selected by a signal applied on Organization Se-

lect (ORG). The bit, byte and word sizes of the

memories are as shown in Table 2.

Table 2. Memory Size versus Organization

Note: 1. Not for New Design

The M93Cx6 is accessed by a set of instructions,

as summarized in Table 3, and in more detail in

Table 4 to Table 6).

Table 3. Instruction Set for the M93Cx6

A Read Data from Memory (READ) instruction

loads the address of the first byte or word to be

read in an internal address register. The data at

this address is then clocked out serially. The ad-

dress register is automatically incremented after

the data is output and, if Chip Select Input (S) is

held High, the M93Cx6 can output a sequential

stream of data bytes or words. In this way, the

memory can be read as a data stream from eight

to 16384 bits long (in the case of the M93C86), or

continuously (the address counter automatically

rolls over to 00h when the highest address is

reached).

Programming is internally self-timed (the external

clock signal on Serial Clock (C) may be stopped or

left running after the start of a Write cycle) and

does not require an Erase cycle prior to the Write

instruction. The Write instruction writes 8 or 16 bits

at a time into one of the byte or word locations of

the M93Cx6. After the start of the programming cy-

S Chip Select Input

D Serial Data Input

Q Serial Data Output

C Serial Clock

ORG Organisation Select

Supply Voltage

Ground

AI01928

M93Cx6

ORG

Device

Number

of Bits

Number

of 8-bit

Bytes

Number

of 16-bit

Words

M93C86 16384 2048 1024

M93C76 8192 1024 512

M93C66 4096 512 256

M93C56 2048 256 128

M93C46 1024 128 64

M93C06

256 32 16

Instruction Description Data

READ Read Data from Memory Byte or Word

WRITE Write Data to Memory Byte or Word

EWEN Erase/Write Enable

EWDS Erase/Write Disable

ERASE Erase Byte or Word Byte or Word

ERAL Erase All Memory

WRAL

Write All Memory

with same Data

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M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

cle, a Busy/Ready signal is available on Serial

Data Output (Q) when Chip Select Input (S) is driv-

en High.

An internal Power-on Data Protection mechanism

in the M93Cx6 inhibits the device when the supply

is too low.

Figure 3. DIP, SO and TSSOP Connections

Note: 1. See page 23 (onwards) for package dimensions, and how

to identify pin-1.

2. DU = Don’t Use.

Figure 4. 90° Turned-SO Connections

Note: 1. See page 26 for package dimensions, and how to identify

pin-1.

2. DU = Don’t Use.

The DU (Don’t Use) pin does not contribute to the

normal operation of the device. It is reserved for

use by STMicroelectronics during test sequences.

The pin may be left unconnected or may be con-

nected to V

or V

. Direct connection of DU to

is recommended for the lowest stand-by pow-

er consumption.

MEMORY ORGANIZATION

The M93Cx6 memory is organized either as bytes

(x8) or as words (x16). If Organization Select

(ORG) is left unconnected (or connected to V

)

the x16 organization is selected; when Organiza-

tion Select (ORG) is connected to Ground (V

)

the x8 organization is selected. When the M93Cx6

is in stand-by mode, Organization Select (ORG)

should be set either to V

or V

for minimum

power consumption. Any voltage between V

and V

applied to Organization Select (ORG)

may increase the stand-by current.

POWER-ON DATA PROTECTION

To prevent data corruption and inadvertent write

operations during power-up, a Power-On Reset

(POR) circuit resets all internal programming cir-

cuitry, and sets the device in the Write Disable

mode.

– At Power-up and Power-down, the device must

not

be selected (that is, Chip Select Input (S)

must be driven Low) until the supply voltage

reaches the operating value V

specified in

Table 8 to Table 10.

– When V

reaches its valid level, the device is

properly reset (in the Write Disable mode) and

is ready to decode and execute incoming in-

structions.

For the M93Cx6 devices (5V range) the POR

threshold voltage is around 3V. For the M93Cx6-

W (3V range) and M93Cx6-R (2V range) the POR

threshold voltage is around 1.5V.

ORG

DUC

AI01929B

M93Cx6

ORGDU

AI00900B

M93Cx6

M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

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INSTRUCTIONS

The instruction set of the M93Cx6 devices con-

tains seven instructions, as summarized in Table 4

to Table 6. Each instruction consists of the follow-

ing parts, as shown in Figure 5:

■ Each instruction is preceded by a rising edge on

Chip Select Input (S) with Serial Clock (C) being

held Low.

■ A start bit, which is the first ‘1’ read on Serial

Data Input (D) during the rising edge of Serial

Clock (C).

■ Two op-code bits, read on Serial Data Input (D)

during the rising edge of Serial Clock (C).

(Some instructions also use the first two bits of

the address to define the op-code).

■ The address bits of the byte or word that is to be

accessed. For the M93C46, the address is

made up of 6 bits for the x16 organization or 7

bits for the x8 organization (see Table 4). For

the M93C56 and M93C66, the address is made

up of 8 bits for the x16 organization or 9 bits for

the x8 organization (see Table 5). For the

M93C76 and M93C86, the address is made up

of 10 bits for the x16 organization or 11 bits for

the x8 organization (see Table 6).

The M93Cx6 devices are fabricated in CMOS

technology and are therefore able to run as slow

as 0 Hz (static input signals) or as fast as the max-

imum ratings specified in Table 19 to Table 22.

Table 4. Instruction Set for the M93C46 and M93C06

Note: 1. X = Don’t Care bit.

2. Address bits A6 and A5 are not decoded by the M93C06.

3. Address bits A5 and A4 are not decoded by the M93C06.

Instruc

tion

Description

Start

bit

Op-

Code

x8 Origination (ORG = 0) x16 Origination (ORG = 1)

Address

1,2

Data

Required

Clock

Cycles

Address

1,3

Data

Required

Clock

Cycles

READ

Read Data from

Memory

1 10 A6-A0 Q7-Q0 A5-A0 Q15-Q0

WRITE

Write Data to

Memory

1 01 A6-A0 D7-D0 18 A5-A0 D15-D0 25

EWEN Erase/Write Enable 1 00 11X XXXX 10 11 XXXX 9

EWDS Erase/Write Disable 1 00 00X XXXX 10 00 XXXX 9

ERASE Erase Byte or Word 1 11 A6-A0 10 A5-A0 9

ERAL Erase All Memory 1 00 10X XXXX 10 10 XXXX 9

WRAL

Write All Memory

with same Data

1 00 01X XXXX D7-D0 18 01 XXXX D15-D0 25

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30

M93C56-RDS6TG

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IC EEPROM 2K SPI 1MHZ 8TSSOP

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M93C56-RDS6TG

M93C56-RDS6TG

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