MAX9107/MAX9108/MAX9109
25ns, Dual/Quad/Single, Low-Power,
TTL Comparators
6 _______________________________________________________________________________________
_______________Detailed Description
Timing
Noise or undesired parasitic AC feedback cause most
high-speed comparators to oscillate in the linear region
(i.e., when the voltage on one input is at or near the
voltage on the other input). The MAX9107/MAX9108/
MAX9109 eliminate this problem by incorporating an
internal hysteresis of 2mV. When the two comparator
input voltages are equal, hysteresis effectively causes
one comparator input voltage to move quickly past the
other, thus taking the input out of the region where
oscillation occurs. Standard comparators require that
hysteresis be added through the use of external resis-
tors. The MAX9107/MAX9108/MAX9109’s fixed internal
hysteresis eliminates these resistors. To increase hys-
teresis and noise margin even more, add positive feed-
back with two resistors as a voltage divider from the
output to the noninverting input.
Adding hysteresis to a comparator creates two trip
points: one for the input voltage rising and one for the
input voltage falling (Figure 1). The difference between
these two input-referred trip points is the hysteresis.
The average of the trip points is the offset voltage.
Figure 1 illustrates the case where IN- is fixed and IN+
is varied. If the inputs were reversed, the figure would
look the same, except the output would be inverted.
The MAX9109 includes an internal latch, allowing the
result of a comparison to be stored. If LE is low, the
latch is transparent (i.e., the comparator operates as
though the latch is not present). The state of the com-
parator output is latched when LE is high (Figure 2).
______________________________________________________________Pin Description
SO
NAME FUNCTION
1 1 — — OUTA Channel A Output
2 2 — — INA- Channel A Inverting Input
3 3 — — INA+ Channel A Noninverting Input
7 7 — — OUTB Channel B Output
6 6 — — INB- Channel B Inverting Input
5 5 — — INB+ Channel B Noninverting Input
— 8 — — OUTC Channel C Output
— 9 — — INC- Channel C Inverting Input
— 10 — — INC+ Channel C Noninverting Input
— 14 — — OUTD Channel D Output
— 13 — — IND- Channel D Inverting Input
— 12 — — IND+ Channel D Noninverting Input
— — 1 7 OUT Output
— — 3 2 IN+ Noninverting Input
— — 4 3 IN- Inverting Input
8461V
CC
Positive Supply
4 11 2 6 GND Ground
— — 5 5 LE Latch E nab l e. The l atch i s tr ansp ar ent w hen LE i s l ow .
— — — 4, 8 N.C. No Connection. Not internally connected.
