6.424
IDT71V416YS, IDT71V416YL 3.3V CMOS Static RAM
4 Meg (256K x 16-Bit) Commercial and Industrial Temperature Ranges
AC Test Conditions
AC Test Loads
Figure 3. Output Capacitive Derating
Figure 1. AC Test Load
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
*Including jig and scope capacitance.
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
1.5ns
1.5V
1.5V
Figures 1,2 and 3
6442 tbl 09
+1.5V
50Ω
I/O
Z
0
=50
Ω
6442 drw 03
30pF
6442 drw 0
320
Ω
350
Ω
5pF*
DATA
OUT
3.3V
IDT71V416S/71V416L
1
2
3
4
5
6
7
20 40 60 80 100 120 140 160
180
200
∆t
AA,
t
ACS
(Typical, ns)
CAPACITANCE (pF)
8
6442drw 05
•
•
•
•
•
•
•
DC Electrical Characteristics
(VDD = Min. to Max., Commercial and Industrial Temperature Ranges)
DC Electrical Characteristics
(1, 2, 3)
(VDD = Min. to Max., VLC = 0.2V, VHC = VDD – 0.2V)
NOTES:
1. All values are maximum guaranteed values.
2. All inputs switch between 0.2V (Low) and VDD -0.2V (High).
3. Power specifications are preliminary.
4. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
5. Standard power 10ns (S10) speed grade only.
I
Dynamic Operating Current
CS <
V
, Outputs Open, V
= Max., f = f
(4 )
S 200 200 180 180 170 170 mA
L 180 — 170 170 160 160
I
Dynamic Standby Power Supply Current
CS >
V
, Outputs Open, V
= Max., f = f
(4 )
S707060605050mA
L 50 — 45 45 40 40
I
Full Standby Power Supply Current (static)
CS >
V
, Outputs Open, V
= Max., f = 0
(4 )
S202020202020mA
L 10 — 10 10 10 10
|I
| Input Leakage Current V
= Max., V
V
to V
___
5µA
|I
| Output Leakage Current V
= Max., CS = V
, V
= V
to V
___
5µA
V
Output Low Voltage I
= 8mA, V
= Min.
___
0.4 V
V
Output High Voltage I
= -4mA, V
= Min. 2.4
___
V