AD842 Data Sheet
GROUNDING AND BYPASSING
In designing practical circuits with the AD842, the user must
take some special precautions whenever high frequencies are
involved.
Figure 31. AD842 Settling Demonstrating No Settling Tails
Circuits must be built with short interconnect leads. Use large
ground planes whenever possible to provide a low resistance,
low inductance circuit path; this also minimizes the effects of
high frequency coupling. Avoid sockets because the increased
interlead capacitance can degrade bandwidth.
Use feedback resistors of low enough value to ensure that the
time constant formed with the circuit capacitances does not
limit the amplifier performance. Resistor values of less than
5 kΩ are recommended. If a larger resistor must be used, a
small (<10 pF) feedback capacitor connected in parallel with
the feedback resistor, R
F
, can be used to compensate for these
stray capacitances and to optimize the dynamic performance of
the amplifier in the particular application.
Bypass power supply leads to ground as close as possible to the
amplifier pins. A 2.2 μF capacitor in parallel with a 0.1 μF
ceramic disk capacitor is recommended.
CAPACITIVE LOAD DRIVING ABILITY
Like all wideband amplifiers, the AD842 is sensitive to
capacitive loading. The AD842 is designed to drive capacitive
loads of up to 20 pF without degradation of its rated
performance. Capacitive loads of greater than 20 pF decrease
the dynamic performance of the device, although instability
does not occur unless the load exceeds 100 pF.
USING A HEAT SINK
The AD842 draws less quiescent power than most precision
high speed amplifiers and is specified for operation without a
heat sink. However, when driving low impedance loads, the
current to the load can be 10 times the quiescent current. This
creates a noticeable temperature rise. Use of a small heat sink
improves performance.
TERMINATED LINE DRIVER
The AD842 is optimized for high speed line driver applications.
Figure 32 shows the AD842 driving a doubly terminated cable
in a gain-of-2 follower configuration. The AD842 maintains a
typical slew rate of 375 V/μs, which means it can drive a ±10 V,
6.0 MHz signal, or a ±3 V, 19.9 MHz signal.
The termination resistor, R
T
, minimizes reflections from the far
end of the cable when equal to the characteristic impedance of
the cable. A back-termination resistor (R
BT
, also equal to the
characteristic impedance of the cable) can be placed between
the AD842 output and the cable to damp any stray signals
caused by a mismatch between R
T
and the characteristic
impedance of the cable. This configuration results in a cleaner
signal. With this circuit, the voltage on the line equals V
IN
because one half of V
OUT
is dropped across R
BT
.
The AD842 has a 100 mA minimum output current and,
therefore, can drive ±5 V into a 50 Ω cable.
Choose the feedback resistors, R1 and R2, carefully. Large value
resistors are desirable to limit the amount of current drawn
from the amplifier output. Large resistors can cause amplifier
instability because the parallel resistance of R1||R2 combines
with the input capacitance (typically 2 pF to 5 pF) to create an
additional pole. The voltage noise of the AD842 is equivalent to
a 5 kΩ resistor; these large resistors can significantly increase
the system noise. Resistor values of 1 kΩ or 2 kΩ are
recommended.
If termination is not used, cables appear as capacitive loads and
can be decoupled from the AD842 by a resistor in series with
the output.
Figure 32. Line Driver Configuration (PDIP)
09477-031
100%
90%
0%
10%
5mV
2µs
OUTPUT:
5V/DIV
OUTPUT
ERROR:
0.01%/DIV
2.2µF
0.1µF
50Ω OR 75Ω
CABLE
R
T
= R
BT
= CABLE
CHARACTERISTIC IMPEDANCE
2.2µF
0.1µF
R1
R2
–V
S
+V
S
V
IN
AD842
11
6
10
4
5
4
R
T
R
BT
TERMINATION
RESISTOR FOR
INPUT SIGNAL
09477-032
Rev. F | Page 10 of 16
