LTC1314CS#TRPBF

4
LTC1314/LTC1315
PIN FUNCTIONS
UUU
TYPICAL PERFORMANCE CHARACTERISTICS
UW
V
DD
(V)
01
I
DD
(µA)
243
5
6
1314/15 G04
80
70
60
50
40
30
20
10
0
VPP
OUT
= VPP
IN
VPP
OUT
= V
CCIN
VPP
OUT
= 0V
OR HI-Z
VPP
IN
= 12V 
V
CCIN
= 5V
T = 25°C
VPP
IN
(V)
0
IPP
IN
(µA)
20
18
16
14
12
10
8
6
4
2
0
4
8
10
1314/15 G05
2
6
12
14
VPP
OUT
= VPP
IN
VPP
OUT
= V
CCIN
VPP
OUT
= 0V
OR HI-Z
V
DD
= V
CCIN
= 5V
T = 25°C
IPP
IN
vs VPP
IN
LTC1314
VPP
IN
(Pin 1):
12V Power Input.
NC (Pin 2): Not Connected.
SHDN (Pin 3): Shutdown Output. When the output is high,
the external 12V regulator can be shut down to conserve
power consumption.
EN0, EN1 (Pins 4, 5): Logic inputs that control the voltage
output on VPP
OUT
. The input thresholds are compatible
with TTL/CMOS levels. Refer to Truth Table.
V
CC0
(Pin 6): Logic input that controls the state of the
MOSFET gate driver DRV3. ESD protection device limits
input excursions to 0.6V below ground.
V
CC1
(Pin 7): Logic input that controls the state of the
MOSFET gate driver DRV5. ESD protection device limits
input excursions to 0.6V below ground.
DRV5, DRV3 (Pins 8, 9): Gate driver outputs that control
the external MOSFETs that switch the V
CC
pin of card slot
to Hi-Z, 3.3V, or 5V.
V
DD
(Pin 10): Positive Supply, 4.5V V
DD
5.5V. This pin
supplies the power to the control logic and the charge
pumps and must be continuously powered.
GND (Pin 11): Ground Connection.
VPP
OUT
(Pin 12): Switched output that provides 0V, 3.3V,
5V, 12V, or Hi-Z to the VPP pin of the card slot. Refer to
Truth Table.
NC (Pin 13): Not Connected.
V
CCIN
(Pin 14): 5V or 3.3V Power Input.
I
DD
vs V
DD
5
LTC1314/LTC1315
PIN FUNCTIONS
UUU
LTC1315
VPP
IN
(Pins 1, 7):
12V Power Inputs.
SHDN (Pins 2, 8): Shutdown Outputs. When the output is
high, the external 12V regulator can be shut down to
conserve power consumption.
EN0, EN1 (Pins 3, 4, 9, 10): Logic inputs that control the
voltage output on VPP
OUT
. The input thresholds are
compatible with TTL/CMOS levels. Refer to the Truth
Table.
V
CC0
(Pins 5, 11): Logic inputs that control the state of the
MOSFET gate driver DRV3. ESD protection device limits
input excursions to 0.6V below ground.
V
CC1
(Pins 6, 12): Logic inputs that control the state of the
MOSFET gate driver DRV5. ESD protection device limits
input excursions to 0.6V below ground.
DRV5, DRV3 (Pins 13, 14, 19, 20): Gate driver outputs
that control the external MOSFETs that switch the V
CC
pin
of card slot to Hi-Z, 3.3V, or 5V.
V
DD
(Pins 15, 21): Positive Supplies, 4.5V V
DD
5.5V.
These pins supply the power to the control logic and the
charge pumps and must be continuously powered.
GND (Pins 16, 22): Ground Connections.
VPP
OUT
(Pins 17, 23): Switched outputs that provide 0V,
3.3V, 5V, 12V, or Hi-Z to the VPP pin of the card slot. Refer
to the Truth Table.
V
CCIN
(Pins 18, 24): 5V or 3.3V Power Inputs.
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
OSCILLATOR
AND BIAS
CHARGE
PUMP
CHARGE
PUMP
BREAK-BEFORE-
MAKE SWITCHES
TTL TO CMOS
CONVERTER
TTL TO CMOS
CONVERTER
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
GATE CHARGE
CONTROL LOGIC
OSCILLATOR AND
CHARGE PUMP
OUTPUT
SWITCHES
TTL TO CMOS
CONVERTER
TTL TO CMOS
CONVERTER
+
SHDN VPP
IN
VPP
IN
V
CC0
V
CC1
10V
EN1
EN0
V
CCIN
VPP
OUT
GND
DRV3
DRV5
LTC1314 • BD
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
BLOCK DIAGRAM
W
LTC1314 or 1/2 LTC1315
6
LTC1314/LTC1315
EN0
EN1
VPP
IN
VCC
IN
VPP
OUT
GND
NOTE: 1µF CAPACITOR CONNECTED ON BOTH VPP
IN
AND V
CCIN
PINS AT TIMING TEST
t
7
LTC1314 • SW
t
5
t
2
t
4
t
1
t
6
t
3
Hi-Z
APPLICATIONS INFORMATION
WUU
U
PCMCIA VPP control is easily accomplished using the
LTC1314 or LTC1315 switching matrix. Two control bits
(LTC1314) or four control bits (LTC1315) determine the
output voltage and standby/operate mode conditions. Out-
put voltages of 0V, V
CCIN
(3.3V or 5V), VPP
IN
, or a high
impedance state are available. When either the high imped-
ance or low voltage (0V) conditions are selected, the device
switches into “sleep” mode and draws 0.1µA of current
from the V
DD
supply.
The LTC1314/LTC1315 are low resistance power MOSFET
switching matrices that operate from the computer system
main power supply. Device power is obtained from V
DD
,
which is 5V ±0.5V. The gate drives for the NFETs (both
internal and external) are derived from internal charge
pumps, therefore VPP
IN
is only required when it’s switched
to VPP
OUT
. Internal break-before-make switches deter-
mine the output voltage and device mode.
Flash Memory Card VPP Power Considerations
PCMCIA compatible flash memory cards require tight
regulation of the 12V VPP programming supply to ensure
that the internal flash memory circuits are never subjected
to damaging conditions. Flash memory circuits are typi-
cally rated with an absolute maximum of 13.5V and VPP
must be maintained at 12V ±5% under all possible load
conditions during erase and program cycles. Undervoltage
can decrease specified flash memory reliability and over-
voltage can damage the device.
V
CC
Switch Driver and VPP Switch Matrix
Figures 1 and 2 show the approach that is very space and
power efficient. The LTC1314/LTC1315 used in conjunc-
tion with the LT1301 DC/DC converter, provide complete
power management for a PCMCIA card slot. The LTC1314/
LTC1315 and LT1301 combination provides a highly effi-
cient, minimal parts count solution. These circuits are
especially good for applications that are adding a PCMCIA
socket to existing systems that currently have only 5V or
3.3V available.
The LTC1314 drives three N-channel (LTC1315 six
N-channel) MOSFETs that provide V
CC
pin power switch-
ing. On-chip charge pumps provide the necessary voltage
to fully enhance the switches. With the charge pumps on-
chip, the MOSFET drive is available without the need for a
12V supply. The LTC1314/LTC1315 provide a natural
break-before-make action and smooth transitions due to
SWITCHI G TI E WAVEFOR S
UWW

LTC1314CS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switch ICs - Various PCMCIA VPP Switch Matrix
Lifecycle:
New from this manufacturer.
Delivery:
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