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EVAL-ADV7403EBZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
Data Sheet ADV7403
The ADV7403 is capable of supporting an external DVI/HDMI
receiver. The digital interface expects 24-bit 4:4:4 or 16-/20-bit
4:2:2 bit data (either graphics RGB or component video YcrCb),
accompanied by HS, VS, DE, and a fully synchronous clock
signal. The data is processed in the CP and output as 16-bit
4:2:2 YcrCb data.
The CP section contains circuitry to enable the detection of
Macrovision encoded YPrPb signals for 525i, 625i, 525p, and
625p. It is designed to be fully robust when decoding these
types of signals.
VBI extraction of CGMS data is performed by the CP section of
the ADV7403 for interlaced, progressive, and high definition
scanning rates. The data extracted can be read back over the I
2
C
interface. For more detailed product information, see the
ADV7403 product page.
Rev. B | Page 15 of 20
ADV7403 Data Sheet
PIXEL INPUT/OUTPUT FORMATTING
Table 9. SDP, CP Pixel Input/Output Pin Map (P19 to P0)
Pixel Port Pins P[19:0]
Processor Mode Format 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SDP Video out, 8-bit, 4:2:2 YcrCb[7:0]
OUT
SDP Video out, 10-bit, 4:2:2 YcrCb[9:0]
OUT
SDP
Video out, 16-bit, 4:2:2
Y[7:0]
OUT
CrCb[7:0]
OUT
SDP Video out, 20-bit, 4:2:2 Y[9:0]
OUT
CrCb[9:0]
OUT
SDP Video out, 24-bit, 4:4:4 Y[7:0]
OUT
Cb[7:0]
OUT
SDP Video out, 30-bit, 4:4:4 Y[9:0]
OUT
Cb[9:0]
OUT
SM-SDP Digital tuner input[1] Output choices are the same as video out 16-/20-bit or pseudo 8-/10-bit DDR
CP 8-bit, 4:2:2, DDR D7 D6 D5 D4 D3 D2 D1 D0
CP
10-bit, 4:2:2, DDR
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
CP 12-bit, 4:4:4, RGB DDR D7 D6 D5 D4 D3 D2 D1 D0 D11 D10 D9 D8
CP Video out, 16-bit, 4:2:2 CHA[7:0]
OUT
(for example, Y[7:0]) CHB/C[7:0]
OUT
(for example, Cr/Cb[7:0])
CP
Video out, 20-bit, 4:2:2
CHA[9:0]
OUT
(for example, Y[9:0])
CHB/C[9:0]
OUT
(for example, Cr/Cb[9:0])
CP Video out, 24-bit, 4:4:4 CHA[7:0]
OUT
(for example, G[7:0]) CHB[7:0]
OUT
(for example, B[7:0])
CP Video out, 30-bit, 4:4:4 CHA[9:0]
OUT
(for example, G[9:0]) CHB[9:0]
OUT
(for example, B[9:0])
SM-CP HDMI receiver support,
24-bit, 4:4:4 input
CHA[7:0]
OUT
(for example, Y[7:0]) R[5:4]
IN
CHB/C[7:0]
OUT
(for example, Cr/Cb[7:0]) R[1:0]
IN
SM-CP
HDMI receiver support
16-bit pass through
CHA[7:0]
OUT
(for example, Y[7:0])
CHB/C[7:0]
OUT
(for example, Cr/Cb[7:0])
SM-CP HDMI receiver support,
20-bit, pass through
CHA[9:0]
OUT
(for example, Y[9:0]) CHB/C[9:0]
OUT
(for example, Cr/Cb[9:0])
Rev. B | Page 16 of 20
Data Sheet ADV7403
Table 10. SDP, CP Pixel Input/Output Pin Map (P40 to P20)
Pixel Port Pins P[40:31], P[29:20]
Processor Mode Format 40 39 38 37 36 35 34 33 32 31 29 28 27 26 25 24 23 22 21 20
SDP Video out, 8-bit, 4:2:2
SDP Video out, 10-bit, 4:2:2
SDP Video out, 16-bit, 4:2:2
SDP Video out, 20-bit, 4:2:2
SDP
Video out, 24-bit, 4:4:4
Cr[7:0]
OUT
SDP Video out, 30-bit, 4:4:4 Cr[9:0]
OUT
SM-SDP Digital tuner input[1] DCVBS[9:0]
IN
CP 8-bit, 4:2:2, DDR
CP 10-bit, 4:2:2, DDR
CP 12-bit, 4:4:4, RGB DDR
CP Video out, 16-bit, 4:2:2
CP Video out, 20-bit, 4:2:2
CP Video out, 24-bit, 4:4:4
input
CHC[7:0]
OUT
(for example, R[7:0])
CP Video out, 30-bit, 4:4:4
input
CHC[9:0]
OUT
(for example, R[9:0])
SM-CP HDMI receiver support,
24-bit, 4:4:4 input
G[7:0]
IN
R[7:6]
IN
B[7:0]
IN
R[3:2]
IN
SM-CP HDMI receiver support,
16-bit, pass through
CHA[7:0]
IN
(for example, Y[7:0]) CHB/C[7:0]
IN
(for example, Cr/Cb[7:0])
SM-CP HDMI receiver support,
20-bit, pass through
CHA[9:0]
IN
(for example, Y[9:0]) CHB/C[9:0]
IN
(for example, Cr/Cb[9:0])
Rev. B | Page 17 of 20
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

EVAL-ADV7403EBZ

Mfr. #:
Buy EVAL-ADV7403EBZ
Manufacturer:
Analog Devices Inc.
Description:
Evaluation Kit For 12Bit, Integrated, Multiformat SDTV/HDTV Video Decoder And RGB Graphics Digitize
Lifecycle:
New from this manufacturer.
Delivery:
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