AVAILABLE
EVALUATION KIT AVAILABLE
Functional Diagrams
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and
ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
General Description
The MAX15024/MAX15025 single/dual, high-speed
MOSFET gate drivers are capable of operating at fre-
quencies up to 1MHz with large capacitive loads. The
MAX15024 includes internal source-and-sink output
transistors with independent outputs allowing for control
of the external MOSFET’s rise and fall time. The
MAX15024 is a single gate driver capable of sinking an
8A peak current and sourcing a 4A peak current. The
MAX15025 is a dual gate driver capable of sinking a 4A
peak current and sourcing a 2A peak current. An inte-
grated adjustable LDO voltage regulator provides gate-
drive amplitude control and optimization.
The MAX15024A and MAX15025A/C accept transistor-
to-transistor (TTL) input logic levels while the
MAX15024B and MAX15025B/D accept CMOS-input
logic levels. High sourcing/sinking peak currents, a low
propagation delay, and thermally enhanced packages
make the MAX15024/MAX15025 ideal for high-frequency
and high-power circuits. The MAX15024/MAX15025
operate from a 4.5V to 28V supply. A separate output dri-
ver supply input enhances flexibility and permits a soft-
start of the power MOSFETs used in synchronous
rectifiers.
The MAX15024/MAX15025 are available in 10-pin
TDFN packages and are specified over the -40°C to
+125°C automotive temperature range.
Applications
Synchronous Rectifier Drivers
Power-Supply Modules
Switching Power Supply
Features
o 8A Peak Sink Current/4A Peak Source Current
(MAX15024)
o 4A Peak Sink Current/2A Peak Source Current
(MAX15025)
o Low 16ns Propagation Delay
o 4.5 V to 28V Supply Voltage Range
o On-Board Adjustable LDO for Gate-Drive
Amplitude Control and Optimization
o Separate Output Driver Supply
o Independent Source and Sink Outputs (MAX15024)
o Matched Delays Between Inverting and
Noninverting Inputs (MAX15024)
o Matched Delays Between Channels (MAX15025)
o CMOS or TTL Logic-Level Inputs with Hysteresis
for Noise Immunity
o -40°C to +125°C Operating Temperature Range
o Thermal-Shutdown Protection
o 1.95W Thermally Enhanced TDFN Power Packages
o AEC-Q100 Qualified
Single/Dual, 16ns, High Sink/Source
Current Gate Drivers
10 87
REG
P_OUT
N_OUT
FB/SET
GND
IN+
MAX15024
9
DRVV
CC
6
1
EP*
*EP = EXPOSED PAD.
3425
PGNDIN-
TDFN
TOP VIEW
Pin Configurations
Ordering Information
Note: All devices are specified over the -40°C to +125°C operating
temperature range.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
/V = denotes an automotive qualified part.
*
EP = Exposed pad. T = Tape and reel.
See the Selector Guide at the end of the data sheet.
Pin Configurations continued at end of data sheet.
Block Diagrams appear at end of data sheet.
PART PIN-PACKAGE
TOP MARK
MAX15024AATB+T 10 TDFN-EP* ATX
MAX15024AATB/V+T
10 TDFN-EP* AWT
MAX15024BATB+T 10 TDFN-EP* ATY
MAX15025AATB+T 10 TDFN-EP* ATZ
MAX15025AATB/V+T
10 TDFN-EP* AYE
MAX15025BATB+T 10 TDFN-EP* AUA
MAX15025CATB+T 10 TDFN-EP* AUB
MAX15025DATB+T 10 TDFN-EP* AUC
MAX15024/MAX15025
19-1053; Rev 3; 4/11
Single/Dual, 16ns, High Sink/Source
Current Gate Drivers
ABSOLUTE MAXIMUM RATINGS
MAX15024 ELECTRICAL CHARACTERISTICS
(V
CC
= V
DRV
= V
REG
= 10V, FB/SET = GND, T
A
= T
J
= -40°C to +125°C, unless otherwise noted. Typical values are at T
A
= T
J
=
+ 25°C). (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC
to GND............................................................-0.3V to +30V
REG to GND..............-0.3V to the lower of +22V or (V
CC
+ 0.3V)
DRV to PGND .........................................................-0.3V to +22V
IN_ ..........................................................................-0.3V to +22V
FB/SET to GND.........................................................-0.3V to +6V
P_OUT to DRV ........................................................-22V to +0.3V
N_OUT to PGND.....................................................-0.3V to +22V
OUT1, OUT2 to PGND ..............................-0.3V to (V
DRV
+ 0.3V)
PGND to GND .......................................................-0.3V to +0.3V
P_OUT, N_OUT Continuous Source/Sink Current* .......... 200mA
OUT1, OUT2 Continuous Source/Sink Current*................200mA
Continuous Power Dissipation (T
A
= +70°C)
10-Pin TDFN, Single-Layer Board
(derate 18.5mW/°C above +70°C)...........................1481.5mW
10-Pin TDFN, Multilayer Board
(derate 24.4mW/°C above +70°C)...........................1951.2mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SYSTEM SPECIFICATIONS
MAX15024B 6.5 28.0
V
CC
powered only, V
REG
=
V
DRV
decoupled with
minimum 1µF to GND
MAX15024A 4.5 28.0
V
CC
= V
REG
= V
DRV
(MAX15024B) 6.5 18.0
Input Voltage Range V
CC
V
CC
= V
REG
= V
DRV
(MAX15024A) 4.5 18.0
V
V
DRV
Turn-On Voltage V
DRV
_
ON
V
CC
= V
REG
= 10V, IN+ = V
CC
, IN- = GND 1.7 2.3 V
Quiescent Supply Current IN_ = V
CC
or GND 700 1350 µA
Quiescent Supply Current
Under UVLO Condition
IN_ = V
CC
or GND 250 µA
Switching Supply Current Switching at 250kHz, C
L
= 0F 1.5 3.0 mA
V
CC
Undervoltage Lockout UVLO_ V
CC
V
CC
rising 3.0 3.4 3.8 V
V
CC
Undervoltage-Lockout
Hysteresis
300 mV
V
CC
rising 100
V
CC
Undervoltage Lockout to
Output Delay
V
CC
falling 2
µs
REG REGULATOR (V
CC
= 12V, REG = V
DRV
, C
L
= 1μF, FB/SET = GND)
Output Voltage V
REG
12V < V
CC
< 28V, 0 < I
LOAD
< 10mA
91011 V
V
CC
= 6.5V, I
LOAD
= 100mA 0.4 0.9
Dropout Voltage V
R
_
DO
V
CC
= 4.5V, I
LOAD
= 50mA 0.2 0.5
V
Load Regulation V
CC
= 12V, I
LOAD
= 0 to 100mA 1 %
Line Re
g
ulation 12V < V
CC
< 28V 10 mV
*
Continuous output current is limited by the power dissipation of the package.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to http://www.maxim-ic.com/thermal-tutorial
.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
10 TDFN
Junction-to-Ambient Thermal Resistance (θ
JA
)...............41°C/W
Junction-to-Case Thermal Resistance (θ
JC
)......................9°C/W
MAX15024/MAX15025
Maxim Integrated
Single/Dual, 16ns, High Sink/Source
Current Gate Drivers
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DRIVER OUTPUT (SINK)
T
A
= +25°C 0.45 0.60
V
CC
= V
REG
= V
DRV
= 10V,
sinking 100mA
T
A
= +125°C 0.625 0.850
T
A
= +25°C 0.50 0.65
Driver Output Resistance R
ON-N
V
CC
= V
REG
= V
DRV
= 4.5V,
sinking 100mA
(MAX15024A)
T
A
= +125°C 0.7 0.9
Ω
Peak Output Current I
PK-N
V
N_OUT
= 10V 8 A
Maximum Load Capacitance
SOA condition: C
L
x V
DRV
2
20µJ,
for V
DRV
= 10V
200 nF
Latchup Robustness 500 mA
DRIVER OUTPUT (SOURCE)
T
A
= +25°C 0.875 1.500
V
CC
= V
REG
= V
DRV
= 10V,
sourcing 100mA
T
A
= +125°C 1.2 2.0
T
A
= +25°C 0.95 1.65
Driver Output Resistance R
ON-P
V
CC
= V
REG
= V
DRV
= 4.5V,
sourcing 100mA
(MAX15024A)
T
A
= +125°C 1.25 2.20
Ω
Peak Output Current I
PK-P
V
P_OUT
= 0V 4 A
Latchup Robustness 500 mA
LOGIC INPUTS
MAX15024A 2.0
Logic 1 Input Voltage V
IH
MAX15024B 4.25
V
MAX15024A 0.8
Logic 0 Input Voltage V
IL
MAX15024B 2
V
MAX15024A 0.4
Logic Input Hysteresis
MAX15024B 1
V
Logic Input Current Leakage V
IN
= 18V or V
GND
-75 0.01 +75 µA
Input Capacitance 10 pF
SWITCHING CHARACTERISTICS FOR V
CC
= V
DRV
= V
REG
= 10V, P_OUT AND N_OUT ARE CONNECTED TOGETHER
(see Figure 1)
C
LOAD
= 1nF 3
C
LOAD
= 5nF 12
Rise Time t
R
C
LOAD
= 10nF 24
ns
C
LOAD
= 1nF 3
C
LOAD
= 5nF 8Fall Time t
F
C
LOAD
= 10nF 16
ns
Turn-On Delay Time t
D-ON
C
LOAD
= 1nF (Note 3) 8 16 32 ns
Turn-Off Delay Time t
D-OFF
C
LOAD
= 1nF (Note 3) 8 16 32 ns
Mismatch Propagation Delays
from Inverting and Noninverting
Inputs to Output
C
LOAD
= 1nF (Note 3) -9 1 +9 ns
MAX15024 ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= V
DRV
= V
REG
= 10V, FB/SET = GND, T
A
= T
J
= -40°C to +125°C, unless otherwise noted. Typical values are at T
A
= T
J
=
+ 25°C). (Note 2)
MAX15024/MAX15025
Maxim Integrated
3

MAX15024BATB+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Gate Drivers Single Low Side
Lifecycle:
New from this manufacturer.
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