NCV4274, NCV4274A
http://onsemi.com
14
APPLICATION DESCRIPTION
Output Regulator
The output is controlled by a precision trimmed reference
and error amplifier. The PNP output has saturation control
for regulation while the input voltage is low, preventing over
saturation. Current limit and voltage monitors complement
the regulator design to give safe operating signals to the
processor and control circuits.
Stability Considerations
The input capacitor C
I1
in Figure 2 is necessary for
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 W in series
with C
I2.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(−25°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information.
The value for the output capacitor C
Q
shown in Figure 2
should work for most applications; however, it is not
necessarily the optimized solution. Stability is guaranteed at
values C
Q
w 2.2 mF and an ESR v 2.5 W within the
operating temperature range. Actual limits are shown in a
graph in the Typical Performance Characteristics section.
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 3) is:
P
D(max)
+ [V
I(max)
* V
Q(min)
]I
Q(max)
) V
I(max)
I
q
(eq. 1)
Where:
V
I(max)
is the maximum input voltage,
V
Q(min)
is the minimum output voltage,
I
Q(max)
is the maximum output current for the application,
and
I
q
is the quiescent current the regulator consumes at I
Q(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
q
JA
can be calculated:
P
q
JA
+
ǒ
150 C * T
A
Ǔ
P
D
(eq. 2)
The value of R
q
JA
can then be compared with those in the
package section of the data sheet. Those packages with
R
q
JA
’s less than the calculated value in Equation 2 will keep
the die temperature below 150°C. In some cases, none of the
packages will be sufficient to dissipate the heat generated by
the IC, and an external heat sink will be required. The current
flow and voltages are shown in the Measurement Circuit
Diagram.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
q
JA
:
R
qJA
+ R
qJC
) R
qCS
) R
qSA
(eq. 3)
Where:
R
q
JC
= the junction−to−case thermal resistance,
R
q
CS
= the case−to−heat sink thermal resistance, and
R
q
SA
= the heat sink−to−ambient thermal resistance.
R
q
JC
appears in the package section of the data sheet.
Like R
q
JA
, it too is a function of package type. R
q
CS
and
R
q
SA
are functions of the package type, heat sink and the
interface between them. These values appear in data sheets
of heat sink manufacturers. Thermal, mounting, and
heat sinking are discussed in the ON Semiconductor
application note AN1040/D, available on the
ON Semiconductor Website.
