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S70GL02GT11FHV010

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
Document Number: 002-13915 Rev. *C Page 10 of 21
S70GL02GT
4. Memory Map
The S70GL02GT consist of uniform 64 kword (128-KB) sectors organized as shown in Table 4.
Note
This table has been condensed to show sector-related information for an entire device on a single page. Sectors and their address ranges that are not explicitly listed
(such as SA001-SA2046) have sector starting and ending addresses that form the same pattern as all other sectors of that size. For example, all 128 KB sectors have the
pattern xxx0000h-xxxFFFFh.
5. Autoselect
Table 5 provides the device identification codes for S70GL02GT. For more information on the autoselect function, refer to the
S29GL-S datasheet (Cypress publication number 002-00247).
Table 4. S70GL02GT Sector and Memory Address Map
Uniform Sector
Size
Sector Count Sector Range Address Range (16-bit) Notes
64 kword/128 KB 2048
SA00 0000000h–000FFFFh Sector Starting Address
: :
SA2047 7FF0000H–7FFFFFFh Sector Ending Address
Table 5. Autoselect Addresses in System
Description Address Read Data (word/byte mode)
Manufacturer ID (Base) + 00h 0001h
Device ID, Word 1 (Base) + 01h 227Eh
Device ID, Word 2 (Base) + 0Eh 2248h
Device ID, Word 3 (Base) + 0Fh 2201h
Secure Device Verify (Base) + 03h
For S70GL02GT highest address sector protect:
XX3Fh = Not Factory Locked
XXBFh = Factory Locked
Sector Protect Verify (SA) + 02h xx01h/01h = Locked, xx00h/00h = Unlocked
Document Number: 002-13915 Rev. *C Page 11 of 21
S70GL02GT
6. DC Characteristics
Notes
1. I
CC
active while Embedded Algorithm is in progress.
2. Not 100% tested.
3. Automatic sleep mode enables the lower power mode when addresses remain stable for a designated time.
4. V
IO
= 1.65 V to V
CC
or 2.7 V to V
CC
depending on the model.
5. V
CC
= 3 V and V
IO
= 3 V or 1.8 V. When V
IO
is at 1.8 V, I/O pins cannot operate at >1.8 V.
6. During power-up there are spikes of current demand, the system needs to be able to supply this current to insure the part initializes correctly.
7. If an embedded operation is in progress at the start of reset, the current consumption will remain at the embedded operation specification until the embedded operation
is stopped by the reset. If no embedded operation is in progress when reset is started, or following the stopping of an embedded operation, I
CC7
will be drawn during
the remainder of t
RPH
. After the end of t
RPH
the device will go to standby mode until the next read or write.
8. For all other DC current values, refer to the S29GL01GT/S29GL512T datasheet.
Table 6. DC Characteristics (–40°C to +85°C)
Parameter Description Test Conditions Min
Typ
(Note 2)
Max Unit
I
LI
Input load current V
IN
= V
SS
to V
CC
, V
CC
= V
CC
max
All Others – ±0.04 ±2.0
µA
WP#,
BYTE#
–±1.0±4.0
I
LO
Output leakage current V
OUT
= V
SS
to V
CC
, V
CC
= V
CC
max – ±0.04 ±2.0 µA
I
CC4
V
CC
standby current
CE#, RESET#, OE# = V
IH
, V
IH
= V
IO
V
IL
= V
SS
, V
CC
= V
CC
max
– 140 200 µA
I
CC5
V
CC
Reset Current (Notes 2, 7)
CE# = V
IH
, RESET# = V
IL
,
V
CC
= V
CC
max
–2040mA
I
CC6
Automatic Sleep Mode (3)
V
IH
= V
IO
, V
IL
= V
SS
,
V
CC
= V
CC
max, t
ACC
+ 30 ns
–612mA
V
IH
= V
IO
, V
IL
= V
SS
,
V
CC
= V
CC
max, t
ASSB
– 200 300 µA
I
CC7
V
CC
Current during power up
(Notes 2, 6)
RESET# = V
IO,
CE# = V
IO
, OE# =
V
IO
, V
CC
= V
CC
max,
– 106 160 mA
Document Number: 002-13915 Rev. *C Page 12 of 21
S70GL02GT
Notes
1. I
CC
active while Embedded Algorithm is in progress.
2. Not 100% tested.
3. Automatic sleep mode enables the lower power mode when addresses remain stable for a designated time.
4. V
IO
= 1.65 V to V
CC
or 2.7 V to V
CC
depending on the model.
5. V
CC
= 3 V and V
IO
= 3 V or 1.8 V. When V
IO
is at 1.8 V, I/O pins cannot operate at >1.8 V.
6. During power-up there are spikes of current demand, the system needs to be able to supply this current to ensure that the part initializes correctly.
7. If an embedded operation is in progress at the start of reset, the current consumption will remain at the embedded operation specification until the embedded operation
is stopped by the reset. If no embedded operation is in progress when reset is started, or following the stopping of an embedded operation, I
CC7
will be drawn during
the remainder of t
RPH
. After the end of t
RPH
the device will go to standby mode until the next read or write.
8. For all other DC current values, refer to the S29GL01GT/S29GL512T datasheet.
Table 7. DC Characteristics (–40 °C to +105 °C)
Parameter Description Test Conditions Min
Typ
(Note 2)
Max Unit
I
LI
Input load current V
IN
= V
SS
to V
CC
, V
CC
= V
CC
max
All Others – ±0.04 ±2.0
µA
WP#,
BYTE#
–±0.5±2.0
I
LO
Output leakage current V
OUT
= V
SS
to V
CC
, V
CC
= V
CC
max – ±0.04 ±2.0 µA
I
CC4
VCC standby current
CE#, RESET#, OE# = V
IH
, V
IH
= V
IO
V
IL
= V
SS
, V
CC
= V
CC
max
– 140 400 µA
I
CC5
V
CC
reset current (Notes 2, 7)
CE# = V
IH
, RESET# = V
IL
,
V
CC
= V
CC
max
–2040mA
I
CC6
Automatic Sleep Mode (3)
V
IH
= V
IO
, V
IL
= V
SS
,
V
CC
= V
CC
max, t
ACC
+ 30 ns
–612mA
V
IH
= V
IO
, V
IL
= V
SS
,
V
CC
= V
CC
max, t
ASSB
– 200 400 µA
I
CC7
V
CC
current during power up
(Notes 2, 6)
RESET# = V
IO,
CE# = V
IO
, OE# =
V
IO
, V
CC
= V
CC
max,
– 106 160 mA
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S70GL02GT11FHV010

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Cypress Semiconductor
Description:
NOR Flash Nor
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