ADG5433/ADG5434 Data Sheet
Rev. C | Page 10 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. ADG5433 TSSOP Pin Configuration
Figure 4. ADG5433 LFCSP_WQ Pin Configuration
Table 8. ADG5433 Pin Function Descriptions
Pin No.
Mnemonic Description
TSSOP LFCSP_WQ
1 15 V
DD
Most Positive Power Supply Potential.
2 16 S1A Source Terminal 1A. This pin can be an input or an output.
3 1 D1 Drain Terminal 1. This pin can be an input or an output.
4 2 S1B Source Terminal 1B. This pin can be an input or an output.
5 3 S2B Source Terminal 2B. This pin can be an input or an output.
6 4 D2 Drain Terminal 2. This pin can be an input or an output.
7 5 S2A Source Terminal 2A. This pin can be an input or an output.
8 6 IN2 Logic Control Input 2.
9 7 IN3 Logic Control Input 3.
10 8 S3A Source Terminal 3A. This pin can be an input or an output.
11 9 D3 Drain Terminal 3. This pin can be an input or an output.
12 10 S3B Source Terminal 3B. This pin can be an input or an output.
13 11 V
SS
Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to
ground.
14 12
EN
Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx
logic inputs determine the on switches.
15 13 IN1 Logic Control Input 1.
16 14 GND Ground (0 V) Reference.
EP
Exposed
Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum
thermal capability, it is recommended that the pad be soldered to the substrate, V
SS
.
Table 9. ADG5433 Truth Table
EN
INx SxA SxB
1 X Off Off
0 0 Off On
0 1 On Off
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1A
D1
S1B
S2A
D2
S2B
V
DD
IN1
EN
V
SS
S3A
IN2 IN3
D3
S3B
GND
ADG5433
TOP VIEW
(Not to Scale)
09207-003
1D1
2
S1B
3
S2B
4D2
11
V
SS
12 EN
10 S3B
9D3
5
S2A
6
IN2
7
IN3
8
S3A
15
V
DD
16
S1A
14
GND
13
IN1
NOTES
1. EXPOSED PAD IS TIED TO SUBSTRATE, V
SS
.
0
9207-005
TOP VIEW
(Not to Scale)
ADG5433
Data Sheet ADG5433/ADG5434
Rev. C | Page 11 of 24
Figure 5. ADG5434 TSSOP Pin Configuration
Figure 6. ADG5434 LFCSP_WQ Pin Configuration
Table 10. ADG5434 Pin Function Descriptions
Pin No.
Mnemonic Description
TSSOP LFCSP_WQ
1 19 IN1 Logic Control Input 1.
2 20 S1A Source Terminal 1A. This pin can be an input or an output.
3 1 D1 Drain Terminal 1. This pin can be an input or an output.
4 2 S1B Source Terminal 1B. This pin can be an input or an output.
5 3 V
SS
Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to
ground.
6 4 GND Ground (0 V) Reference.
7 5 S2B Source Terminal 2B. This pin can be an input or an output.
8 6 D2 Drain Terminal 2. This pin can be an input or an output.
9 7 S2A Source Terminal 2A. This pin can be an input or an output.
10 8 IN2 Logic Control Input 2.
11 9 IN3 Logic Control Input 3.
12 10 S3A Source Terminal 3A. This pin can be an input or an output.
13 11 D3 Drain Terminal 3. This pin can be an input or an output.
14 12 S3B Source Terminal 3B. This pin can be an input or an output.
15 N/A NC No Connect.
16 13 V
DD
Most Positive Power Supply Potential.
17 14 S4B Source Terminal 4B. This pin can be an input or an output.
18 15 D4 Drain Terminal 4. This pin can be an input or an output.
19 16 S4A Source Terminal 4A. This pin can be an input or an output.
20 17 IN4 Logic Control Input 4.
N/A 18
EN
Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx
logic inputs determine the on switches.
N/A EP
Exposed
Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum
thermal capability, it is recommended that the pad be soldered to the substrate, V
SS
.
Table 11. ADG5434 Truth Table
INx SxA SxB
0 Off On
1 On Off
1
2
3
4
5
6
8
20
19
18
17
16
15
13
S1A
D1
S1B
7
S2B
GND
V
SS
IN1
S4A
D4
S4B
14
S3B
9
S2A
12
S3A
10
IN2
11
IN3
D2 D3
NC
V
DD
IN4
ADG5434
TOP VIEW
(Not to Scale)
NC = NO CONNECT
09207-004
D1
S1B
V
SS
GND
S2B
V
DD
S4B
D4
S3B
D3
D2
S2A
IN2
S3A
IN3
EN
IN1
S1A
IN4
S4A
09207-006
14
13
12
1
3
4
15
11
2
5
7
6
8
9
10
19
20
18
17
16
ADG5434
TOP VIEW
(Not to Scale)
NOTES
1. THE EXPOSED PAD IS CONNECTED INTERNALLY.
FOR INCREASED RELIABILITY OF THE SOLDER
JOINTSAND MAXIMUM THERMAL CAPABILITY,
IT IS RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE, V
SS
.
ADG5433/ADG5434 Data Sheet
Rev. C | Page 12 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7. On Resistance as a Function of V
S
, V
D
(Dual Supply)
Figure 8. On Resistance as a Function of V
S
, V
D
(Dual Supply)
Figure 9. On Resistance as a Function of V
S
, V
D
(Single Supply)
Figure 10. On Resistance as a Function of V
S
, V
D
(Single Supply)
Figure 11. On Resistance as a Function of V
S
(V
D
) for Different Temperatures,
±15 V Dual Supply
Figure 12. On Resistance as a Function of V
S
(V
D
) for Different Temperatures,
±20 V Dual Supply
0
5
10
15
20
25
–18 –14 –10
–6
–2
2
6 10
14
18
ON RESISTANCE (Ω)
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= +9V
V
SS
= –9V
V
DD
= +10V
V
SS
= –10V
V
DD
= +11V
V
SS
= –11V
V
DD
= +13.5V
V
SS
= –13.5V
V
DD
= +15V
V
SS
= –15V
V
DD
= +16.5V
V
SS
= –16.5V
09207-047
0
2
4
6
8
10
12
14
16
–25
–20
–15
–10
–5
0 5 10
15
20
25
ON RESISTANCE (Ω)
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= +22V
V
SS
= –22V
V
DD
= +20V
V
SS
= –20V
V
DD
= +18V
V
SS
= –18V
09207-048
0
5
10
15
20
25
30
35
0
2
4 6
8
10
12 14
ON RESISTANCE (Ω)
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= 9V
V
SS
= 0V
V
DD
= 10V
V
SS
= 0V
V
DD
= 10.8V
V
SS
= 0V
V
DD
= 11V
V
SS
= 0V
V
DD
= 12V
V
SS
= 0V
V
DD
= 13.2V
V
SS
= 0V
09207-044
0
2
4
6
8
10
12
14
16
0
5
10 15
20
25 30
35
40
45
ON RESISTANCE (Ω)
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= 39.6V
V
SS
= 0V
V
DD
= 36V
V
SS
= 0V
V
DD
= 32.4V
V
SS
= 0V
09207-046
0
5
10
15
20
25
–15
–10
–5
0 5 10 15
ON RESISTANCE (Ω)
V
S
, V
D
(V)
V
DD
= +15V
V
SS
= –15V
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
09207-049
0
5
10
15
20
25
–20
–15
–10
–5
0 5 10
15
20
ON RESISTANCE (Ω)
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
V
S
, V
D
(V)
V
DD
= +20V
V
SS
= –20V
09207-045

ADG5434BRUZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs 12.5Ohm -60dB 140MHz High VTG Latch-up
Lifecycle:
New from this manufacturer.
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